Skip to content
View AmirSharf's full-sized avatar
🎯
Focusing
🎯
Focusing
Block or Report

Block or report AmirSharf

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
AmirSharf/README.md

Hi , I'm Amir Sharfuddin

logo

A passionate FPGA developer from India

Connect with me:

amir sharfuddin amir sharfuddin amir sharfu amir sharfuddin amir_sharfu m5jFN3CMKD

GIF

Languages and Tools:

xilinx

VHDL

Verilog

c css3 docker figma git html5 java javascript linux matlab

android

amirsharf

Β amirsharf

amirsharf

πŸŠβ€β™‚οΈ Weekly Development Breakdown

IP            1 hr 58 mins  β–ˆβ–ˆβ–ˆβ–ˆβ–ˆβ–ˆβ–ˆβ–ˆβ–ˆβ–ˆβ–ˆβ–ˆβ–ˆβ–ˆβ–“β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘  46.3%
VHDL               37 mins  β–ˆβ–ˆβ–ˆβ–ˆβ–ˆβ–ˆβ–ˆβ–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘  14.8%
TCAD               28 mins  β–ˆβ–ˆβ–ˆβ–ˆβ–ˆβ–ˆβ–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘  11.1%
Zynq               21 mins  β–ˆβ–ˆβ–ˆβ–ˆβ–ˆβ–’β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘   8.4%
JavaScript         17 mins  β–ˆβ–ˆβ–ˆβ–ˆβ–ˆβ–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘   6.9%
Canva              11 mins  β–ˆβ–ˆβ–ˆβ–ˆβ–“β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘β–‘   4.5%

⏳ Year progress { β–ˆβ–ˆβ–β–β–β–β–β–β–β–β–β–β–β–β–β–β–β–β–β–β–β–β–β–β–β–β–β–β–β– } 4.87 %

Quote

Github Stats

Popular repositories Loading

  1. Silvaco_TCAD Silvaco_TCAD Public

    3

  2. AmirSharf AmirSharf Public

    Config files for my GitHub profile.

    1

  3. educational-materials educational-materials Public

    Forked from riscvarchive/educational-materials

    Educational materials for RISC-V

    1

  4. 30DaysPythonChallenge 30DaysPythonChallenge Public

    Forked from YPCC/30DaysPythonChallenge

    Python

  5. Verilog_Geek Verilog_Geek Public

    #HardwareLanuage #ElectronicsLanguage

  6. Tides_of_VHDL Tides_of_VHDL Public

    Sharing is caring

    VHDL 1