Integrate new type system in compilation flow

This (huge!) commit integrates our new handshake-explicit type system to
the compilation flow, as proposed in `docs/Specs/TypeSystem.md`. All
integration tests are confirmed to compile and simulate successfully
using the new type system.

All passes living between (and including) the `CfToHandshake` conversion
pass and the `HandshakeToHW` conversion pass are affected, some
significantly, by the move to our new type system. The `export-dot` tool
is also cosmetically affected, whereas the `export-rtl` tool sees a
decent number of changes (in particular, to handle the
`handshake::ControlType`). The syntax of the majority of our unit tests
is also adapted to refelct out new types' syntax (which, in most cases,
is pretty-printed to avoid severe eye sores).

There are still open tasks to completely integrate the new type system,
mostly revolving around support for external signals in the backend.
These will come soon in future commits.

.vscode/c_cpp_properties.json

@@ -4,6 +4,7 @@
       "name": "Linux",
       "includePath": [
         "${workspaceFolder}/include/",
+        "${workspaceFolder}/build/",
         "${workspaceFolder}/build/include/",
         "${workspaceFolder}/experimental/include/",
         "${workspaceFolder}/build/experimental/include/",

CMakeLists.txt

@@ -82,6 +82,7 @@ list(APPEND CMAKE_MODULE_PATH "${CMAKE_CURRENT_SOURCE_DIR}/cmake/modules")
 
 # Dynamatic include directories
 include_directories(${DYNAMATIC_INCLUDE_DIR})
+include_directories(DYNAMATIC_BINARY_DIR ${CMAKE_BINARY_DIR})
 include_directories(${DYNAMATIC_BIN_INCLUDE_DIR})
 include_directories(${DYNAMATIC_EXPERIMENTAL_DIR}/include)
 include_directories(${DYNAMATIC_BINARY_DIR}/experimental/include)

experimental/data/rtl-config.json

@@ -1,24 +1,24 @@
 [
   {
-    "name": "arith.addf",
+    "name": "handshake.addf",
     "parameters": [{ "name": "DATA_WIDTH", "type": "unsigned" }],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/addf.vhd",
     "dependencies": ["join", "delay_buffer", "oehb", "flopoco_ip_cores"]
   },
   {
-    "name": "arith.addi",
+    "name": "handshake.addi",
     "parameters": [{ "name": "DATA_WIDTH", "type": "unsigned" }],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/addi.vhd",
     "dependencies": ["join"]
   },
   {
-    "name": "arith.andi",
+    "name": "handshake.andi",
     "parameters": [{ "name": "DATA_WIDTH", "type": "unsigned" }],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/andi.vhd",
     "dependencies": ["join"]
   },
   {
-    "name": "arith.cmpf",
+    "name": "handshake.cmpf",
     "parameters": [
       { "name": "PREDICATE", "type": "string" },
       { "name": "DATA_WIDTH", "type": "unsigned", "generic": true }
@@ -27,7 +27,7 @@
     "dependencies": ["join", "flopoco_ip_cores"]
   },
   {
-    "name": "arith.cmpi",
+    "name": "handshake.cmpi",
     "parameters": [
       { "name": "PREDICATE", "type": "string" },
       { "name": "DATA_WIDTH", "type": "unsigned", "generic": true }
@@ -36,120 +36,120 @@
     "dependencies": ["join"]
   },
   {
-    "name": "arith.divf",
+    "name": "handshake.divf",
     "parameters": [{ "name": "DATA_WIDTH", "type": "unsigned" }],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/divf.vhd",
     "dependencies": ["join", "delay_buffer", "oehb", "flopoco_ip_cores"]
   },
   {
-    "name": "arith.divsi",
+    "name": "handshake.divsi",
     "parameters": [{ "name": "DATA_WIDTH", "type": "unsigned" }],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/divsi.vhd",
     "dependencies": ["join", "delay_buffer"]
   },
   {
-    "name": "arith.divui",
+    "name": "handshake.divui",
     "parameters": [{ "name": "DATA_WIDTH", "type": "unsigned" }],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/divui.vhd",
     "dependencies": ["join", "delay_buffer"]
   },
   {
-    "name": "arith.extsi",
+    "name": "handshake.extsi",
     "parameters": [
       { "name": "INPUT_WIDTH", "type": "unsigned" },
       { "name": "OUTPUT_WIDTH", "type": "unsigned" }
     ],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/extsi.vhd"
   },
   {
-    "name": "arith.extui",
+    "name": "handshake.extui",
     "parameters": [
       { "name": "INPUT_WIDTH", "type": "unsigned" },
       { "name": "OUTPUT_WIDTH", "type": "unsigned" }
     ],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/extui.vhd"
   },
   {
-    "name": "arith.maximumf",
+    "name": "handshake.maximumf",
     "parameters": [{ "name": "DATA_WIDTH", "type": "unsigned" }],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/maximumf.vhd",
     "dependencies": ["join", "delay_buffer"]
   },
   {
-    "name": "arith.minimumf",
+    "name": "handshake.minimumf",
     "parameters": [{ "name": "DATA_WIDTH", "type": "unsigned" }],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/minimumf.vhd",
     "dependencies": ["join", "delay_buffer"]
   },
   {
-    "name": "arith.mulf",
+    "name": "handshake.mulf",
     "parameters": [{ "name": "DATA_WIDTH", "type": "unsigned" }],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/mulf.vhd",
     "dependencies": ["join", "delay_buffer", "oehb", "flopoco_ip_cores"]
   },
   {
-    "name": "arith.muli",
+    "name": "handshake.muli",
     "parameters": [{ "name": "DATA_WIDTH", "type": "unsigned" }],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/muli.vhd",
     "dependencies": ["join", "delay_buffer", "oehb"]
   },
   {
-    "name": "arith.negf",
+    "name": "handshake.negf",
     "parameters": [{ "name": "DATA_WIDTH", "type": "unsigned" }],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/negf.vhd"
   },
   {
-    "name": "arith.ori",
+    "name": "handshake.ori",
     "parameters": [{ "name": "DATA_WIDTH", "type": "unsigned" }],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/ori.vhd",
     "dependencies": ["join"]
   },
   {
-    "name": "arith.select",
+    "name": "handshake.select",
     "parameters": [{ "name": "DATA_WIDTH", "type": "unsigned" }],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/select.vhd",
     "module-name": "selector"
   },
   {
-    "name": "arith.shli",
+    "name": "handshake.shli",
     "parameters": [{ "name": "DATA_WIDTH", "type": "unsigned" }],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/shli.vhd",
     "dependencies": ["join"]
   },
   {
-    "name": "arith.shrsi",
+    "name": "handshake.shrsi",
     "parameters": [{ "name": "DATA_WIDTH", "type": "unsigned" }],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/shrsi.vhd",
     "dependencies": ["join"]
   },
   {
-    "name": "arith.shrui",
+    "name": "handshake.shrui",
     "parameters": [{ "name": "DATA_WIDTH", "type": "unsigned" }],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/shrui.vhd",
     "dependencies": ["join"]
   },
   {
-    "name": "arith.subf",
+    "name": "handshake.subf",
     "parameters": [{ "name": "DATA_WIDTH", "type": "unsigned" }],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/subf.vhd",
     "dependencies": ["join", "delay_buffer", "oehb", "flopoco_ip_cores"]
   },
   {
-    "name": "arith.subi",
+    "name": "handshake.subi",
     "parameters": [{ "name": "DATA_WIDTH", "type": "unsigned" }],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/subi.vhd",
     "dependencies": ["join"]
   },
   {
-    "name": "arith.trunci",
+    "name": "handshake.trunci",
     "parameters": [
       { "name": "INPUT_WIDTH", "type": "unsigned" },
       { "name": "OUTPUT_WIDTH", "type": "unsigned" }
     ],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/trunci.vhd"
   },
   {
-    "name": "arith.xori",
+    "name": "handshake.xori",
     "parameters": [{ "name": "DATA_WIDTH", "type": "unsigned" }],
     "generic": "$DYNAMATIC/experimental/data/vhdl/arith/xori.vhd",
     "dependencies": ["join"]

experimental/lib/Transforms/ResourceSharing/Crush.cpp

@@ -170,12 +170,12 @@ class FPGA20BuffersWrapper : public FPGA20Buffers {
                        Logger &logger, StringRef milpName)
       : FPGA20Buffers(env, funcInfo, timingDB, targetPeriod, legacyPlacement,
                       logger, milpName),
-        sharingInfo(sharingInfo){};
+        sharingInfo(sharingInfo) {};
   FPGA20BuffersWrapper(SharingInfo &sharingInfo, GRBEnv &env,
                        FuncInfo &funcInfo, const TimingDatabase &timingDB,
                        double targetPeriod, bool legacyPlacement)
       : FPGA20Buffers(env, funcInfo, timingDB, targetPeriod, legacyPlacement),
-        sharingInfo(sharingInfo){};
+        sharingInfo(sharingInfo) {};
 
 private:
   SharingInfo &sharingInfo;
@@ -198,12 +198,12 @@ class FPL22BuffersWraper : public CFDFCUnionBuffers {
                      CFDFCUnion &cfUnion, Logger &logger, StringRef milpName)
       : CFDFCUnionBuffers(env, funcInfo, timingDB, targetPeriod, cfUnion,
                           logger, milpName),
-        sharingInfo(sharingInfo){};
+        sharingInfo(sharingInfo) {};
   FPL22BuffersWraper(SharingInfo &sharingInfo, GRBEnv &env, FuncInfo &funcInfo,
                      const TimingDatabase &timingDB, double targetPeriod,
                      CFDFCUnion &cfUnion)
       : CFDFCUnionBuffers(env, funcInfo, timingDB, targetPeriod, cfUnion),
-        sharingInfo(sharingInfo){};
+        sharingInfo(sharingInfo) {};
 
 private:
   SharingInfo &sharingInfo;
@@ -288,7 +288,7 @@ struct HandshakePlaceBuffersPassWrapper : public HandshakePlaceBuffersPass {
                                    bool dumpLogs)
       : HandshakePlaceBuffersPass(algorithm, frequencies, timingModels,
                                   firstCFDFC, targetCP, timeout, dumpLogs),
-        sharingInfo(sharingInfo){};
+        sharingInfo(sharingInfo) {};
   SharingInfo &sharingInfo;
 
 #ifndef DYNAMATIC_GUROBI_NOT_INSTALLED
@@ -371,8 +371,8 @@ struct CreditBasedSharingPass
     for (Operation &op : funcOp.getOps()) {
       // This is a list of sharable operations. To support more operation types,
       // simply add in the end of the list.
-      if (isa<mlir::arith::MulFOp, mlir::arith::MulIOp, mlir::arith::AddFOp,
-              mlir::arith::SubFOp>(op)) {
+      if (isa<handshake::MulFOp, handshake::MulIOp, handshake::AddFOp,
+              handshake::SubFOp>(op)) {
         assert(op.getNumOperands() > 1 && op.getNumResults() == 1 &&
                "Invalid sharing target is being added to the list of sharing "
                "targets! Currently operations with 1 input or more than 1 "

experimental/lib/Transforms/Speculation/HandshakeSpeculation.cpp

@@ -13,6 +13,7 @@
 #include "experimental/Transforms/Speculation/HandshakeSpeculation.h"
 #include "dynamatic/Analysis/NameAnalysis.h"
 #include "dynamatic/Dialect/Handshake/HandshakeOps.h"
+#include "dynamatic/Dialect/Handshake/HandshakeTypes.h"
 #include "dynamatic/Support/Backedge.h"
 #include "dynamatic/Support/CFG.h"
 #include "dynamatic/Support/DynamaticPass.h"
@@ -342,8 +343,8 @@ std::optional<Value> findControlInputToBB(Operation *op) {
     // Iterate the operands in the edge
     for (mlir::OpOperand *p : arc.edges) {
       Value inEdge = p->get();
-      // The control signal should be the only NoneType input to the BB
-      if (inEdge.getType().isa<mlir::NoneType>())
+      // The control signal should be the only control input to the BB
+      if (inEdge.getType().isa<handshake::ControlType>())
         return inEdge;
     }
   }