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@Hmikihiro Hmikihiro commented Jul 8, 2025 •
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---- handlers::pull_assignment_up::tests::test_pull_assignment_up_if stdout ----

thread 'handlers::pull_assignment_up::tests::test_pull_assignment_up_if' panicked at /Users/hayashi-mikihiro/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/rowan-0.15.15/src/ast.rs:73:50:
can't resolve SyntaxNodePtr { kind: EXPR_STMT, range: 53..59 } with IF_EXPR@35..93

Hmikihiro added 3 commits July 8, 2025 16:12
@Hmikihiro
Migrate pull_assignment_up assist to SyntaxEditor
1b4bfba 
Signed-off-by: Hayashi Mikihiro <34ttrweoewiwe28@gmail.com>
@Hmikihiro
pull up editor
24eeab0 
Signed-off-by: Hayashi Mikihiro <34ttrweoewiwe28@gmail.com>
@Hmikihiro
pull up editor simply
3e49087 
Signed-off-by: Hayashi Mikihiro <34ttrweoewiwe28@gmail.com>
@Hmikihiro Hmikihiro mentioned this pull request Jul 8, 2025
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Hmikihiro pushed a commit that referenced this pull request Jul 17, 2025
@Kobzol
Rollup merge of #143881 - orlp:once-state-repr, r=tgross35
bc5c05c 
Use zero for initialized Once state

By re-labeling which integer represents which internal state for `Once` we can ensure that the initialized state is the all-zero state. This is beneficial because some CPU architectures (such as Arm) have specialized instructions to specifically branch on non-zero, and checking for the initialized state is by far the most important operation.

As an example, take this:

```rust
use std::sync::atomic::{AtomicU32, Ordering};

const INIT: u32 = 3;

#[inline(never)]
#[cold]
pub fn slow(state: &AtomicU32) {
    state.store(INIT, Ordering::Release);
}

pub fn ensure_init(state: &AtomicU32) {
    if state.load(Ordering::Acquire) != INIT {
        slow(state)
    }
}
```

If `INIT` is 3 (as is currently the state for `Once`), we see the following assembly on `aarch64-apple-darwin`:

```asm
example::ensure_init::h332061368366e313:
        ldapr   w8, [x0]
        cmp     w8, #3
        b.ne    LBB1_2
        ret
LBB1_2:
        b       example::slow::ha042bd6a4f33724e
```

By changing the `INIT` state to zero we get the following:

```asm
example::ensure_init::h332061368366e313:
        ldapr   w8, [x0]
        cbnz    w8, LBB1_2
        ret
LBB1_2:
        b       example::slow::ha042bd6a4f33724e
```

So this PR saves 1 instruction every time a `LazyLock` gets accessed on platforms such as these.
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