4 to 12 Demultiplexer:

About the project:

• Inputs: D the data in, S the 4-bits select lines and Ebar the active-low enable input.
• Outputs: Y 12-bits bus.
• It uses 3 of 2-to-4 demultiplexers to make a full 4-to-12 demultiplexer.

What did I learn from it:

• Using components in VHDL to build bigger systems.
• Using map function.