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Releases: JonathSpirit/GP8B

GP8B-V5.1

11 Oct 07:16
6335b5a
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This is a stable release.

  • GLOBAL

    • Small cleaning
  • DOCUMENTS

    • Reverse changelog order (new version will be on the first line)
  • SCHEMATICS

    • Better/More decoupling capacitor
    • Replacing old symbol for IC1 (CPLD)
    • Fixing the SPI 4bits only issue
    • ADDSCR_CLK was not sending the right pulses to the motherboard, this is due to
      old version without any standard in mind.
  • PCB

    • J1 wasn't a male connector
  • SCHEMATICS FEATURES

    • Now if the argument is not SRCVALUE, the processor will not go to the next address (1 byte in memory saved)
      on big program this improvement is not negligible.

GP8B-V5.0

23 Sep 20:02
b6e3ff0
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GP8B-V5.0 Pre-release
Pre-release

This is a more public friendly update.

GP8B V5.0 :

  • GLOBAL

    • Switching "CERN-OHL v1.2" license to "CERN-OHLw v2 or later"
  • DOCUMENTS

    • Adding the GP8B datasheet
    • Adding waveforms
    • Adding the CHANGELOG file
    • Cleaning
  • SCHEMATICS

    • Small symbols changes
    • Removing old symbols
    • Adding TPS7A0518PDBZR symbol
    • Adding SN74LVC8T245DW symbol
    • Adding SN74AVC4T245D symbol
    • Set version to 5.0
    • Replacing all used 74x1Gxx symbols
      (shared power pin fix, and visual)
      (same for CD74AC238)
  • PCB

    • Removing old footprints
    • Set version to 5.0
    • Adding QRCode with the Github link
    • Fixing 3D
  • SCHEMATICS FEATURES

    • Replacing the old XC95288XL-10TQ144 by XC2C256-VQ100
      XC95288XL is a obsolete CPLD and is now replaced with
      a CoolRunnerII familly CPLD.
      the XC2C256-VQ100 is more hand-solder friendly too.

    • Adding the regulator TPS7A0518PDBZR for 1.8V (CPLD)

    • Adding VREF (3.3V) to the JTAG connector

    • Removing some unused pins and shrink the connector (J4) down

    • Adding a new connector for all the ALU pins (J5)

    • All capacitor for the CPLD is now 100nF

    • Adding SN74LVC8T245DW and SN74AVC4T245D to translate logic level for the CPLD

    • Renamed some connectors

    • SPI : now data come from the 8bits D-latch register (was directly controlled by the number bus)

    • Mounting holes is now on schematics

    • Renaming "OPC_CLK" to "OPCHOOSE_CLK"

    • Renaming "BCSPI_CLK" to "BCFG_SPI_CLK"

    • Renaming "Connecteur" sheet to "Connector" and "Connector.sch" to "fileConnector.sch"

    • Renaming "Registre" sheet to "Register" and "fileRegistre.sch" to "fileRegister.sch"

    • Renaming "Ram.sch" to "fileRAM.sch"

    • Renaming "SPI.sch" to "fileSPI.sch"

    • Apply the MM1 memory standard (3.3V I/O changes)

GP8B-V4.0

01 Jul 13:46
4115dc9
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GP8B-V4.0 Pre-release
Pre-release

GP8B V4.0 :
- Intial release