HLSL: error X4503: output TEXCOORD2 used more than once

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Real life case:

Run into this compilation bug, while working on my game engine. Basically I have this GLSL code:

layout(location = 0) out VsData {
  vec2 uv;           // mapped to TEXCOORD0
  vec4 shadowPos[2]; // mapped to TEXCOORD1+TEXCOORD2, because it's array with size = 2
  vec3 normal;       // mapped to TEXCOORD2, but should be TEXCOORD3
  vec4 color;
  vec4 pos;
  vec4 scr;
  } shOut;

Unit test level:

Test-case shaders-hlsl\vert\locations.vert can be modified to reproduce the issue:

--- a/shaders-hlsl/vert/locations.vert
+++ b/shaders-hlsl/vert/locations.vert
@@ -23,13 +23,13 @@ layout(location = 1) out float vLocation1;
 layout(location = 2) out float vLocation2[2];
 // Picks first available location, 4.
 layout(location = 4) out Foo vLocation4;
-// Picks first available location 9.
-layout(location = 9) out float vLocation9;
+// Picks first available location 10.
+layout(location = 10) out float vLocation10;

 // Locks location 7 and 8.
 layout(location = 7) out VertexOut
 {
-       vec3 color;
+       vec3 color[2];
        vec3 foo;
 } vout;

@@ -45,7 +45,8 @@ void main()
        foo.b = vec3(1.0);
        foo.c = vec3(1.0);
        vLocation4 = foo;
-       vLocation9 = 9.0;
-       vout.color = vec3(2.0);
+       vLocation10 = 9.0;
+       vout.color[0] = vec3(2.0);
+       vout.color[1] = vec3(3.0);
        vout.foo = vec3(4.0);
 }

^ basically replace vec3 color to vec3 color[2]

Proposed solution:

Fix register mappings in CompilerHLSL::emit_io_block

Follow up problem:

I made a quick-fix and test locally, only to run into next issue:

D3D12 ERROR: ID3D12Device::CreateGraphicsPipelineState: Vertex Shader - Pixel Shader linkage error:
Signatures between stages are incompatible. Semantic 'TEXCOORD' is defined for mismatched hardware
registers between the output stage and input stage.
[ STATE_CREATION ERROR #660: CREATEGRAPHICSPIPELINESTATE_SHADER_LINKAGE_REGISTERINDEX]

After a some research I found out that this is seemingly DX12 bug, caused by mixing return and out in main function:
SPIRV_Cross_Output main(SPIRV_Cross_Input stage_input, out VertexOut stage_outputvout)

Proposed solution:

Discard usage of out blocks in favor of one only SPIRV_Cross_Output, with all outputs.

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Maybe related to #1611