🧠 LeetCode for ASIC/SoC Verification Engineers

---

🎯 Objective

This repository contains LeetCode-style coding questions designed for Design Verification (DV) engineers. Each problem aligns with real-world scenarios commonly encountered in UVM environments, such as AXI protocol tracking, scoreboard validation, transaction flow, and bit-level manipulation.

---

📌 Who This Is For

• ASIC/SoC Design Verification Engineers
• Engineers aiming to strengthen their algorithmic problem-solving in a verification setting

---

📁 Folder Structure

leetcode-for-asic-verification/
├── Problem_001_FirstUnackedTxn/
│   ├── problem.md
│   ├── solution.sv       //SystemVerilog Solution
│   ├── solution.py       //Python Solution
│   └── notes.txt
├── Problem_002_BitfieldExtract/
│   ├── problem.md
│   └── solution.py
├── ...
├── README.md