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Manthan-cpu/README.md

๐Ÿ‘‹ Hi, Iโ€™m Manthan Gupta

  • ๐ŸŽ“ B.Tech student at IIT Indore
  • ๐Ÿ’ก Passionate about VLSI, digital design, and microarchitecture
  • ๐Ÿ’ป Comfortable with C++ and Data Structures & Algorithms
  • ๐Ÿ Learning Python to automate and enhance my workflow

๐Ÿ› ๏ธ Skills

  • Languages: Verilog, C++, Python
  • Domains: Digital Logic, Pipelining, FPGA, DSA
  • Tools: Vivado, LTSpice, GitHub, VS Code

๐Ÿš€ Interests

  • VLSI & ASIC Design
  • CPU Microarchitecture
  • Hardware-Software Co-Design

๐Ÿ“ซ Contact


โ€œFrom gates to graphs โ€” building systems and solving problems.โ€

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