@@ -1,5 +1,5 @@
/* Copyright (c) 2008 MySQL AB, 2009 Sun Microsystems, Inc.
Use is subject to license terms .
Copyright (c) 2019, MariaDB Corporation .
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@@ -23,6 +23,20 @@
#ifndef MY_RDTSC_H
#define MY_RDTSC_H
# ifndef __has_builtin
# define __has_builtin (x ) 0 /* Compatibility with non-clang compilers */
# endif
# if __has_builtin(__builtin_readcyclecounter)
# elif defined _WIN32
# include < intrin.h>
# elif defined __i386__ || defined __x86_64__
# include < x86intrin.h>
# elif defined(__INTEL_COMPILER) && defined(__ia64__) && defined(HAVE_IA64INTRIN_H)
# include < ia64intrin.h>
# elif defined(HAVE_SYS_TIMES_H) && defined(HAVE_GETHRTIME)
# include < sys/times.h>
# endif
/* *
Characteristics of a timer.
*/
@@ -62,12 +76,104 @@ C_MODE_START
/* *
A cycle timer.
On clang, we use __builtin_readcyclecounter().
On other compilers:
On IA-32 and AMD64, we use the RDTSC instruction.
On IA-64, we read the ar.itc register.
On SPARC, we read the tick register.
On POWER, we read the Time Base Register (which is not really a cycle count
but a separate counter with less than nanosecond resolution).
On IBM S/390 System z we use the STCK instruction.
On ARM, we probably should use the Generic Timer, but should figure out
how to ensure that it can be accessed.
Sadly, we have nothing for the Digital Alpha, MIPS, Motorola m68k,
HP PA-RISC or other non-mainstream (or obsolete) processors.
TODO: consider C++11 std::chrono::high_resolution_clock.
We fall back to gethrtime() where available.
On the platforms that do not have a CYCLE timer,
"wait" events are initialized to use NANOSECOND instead of CYCLE
during performance_schema initialization (at the server startup).
Linux performance monitor (see "man perf_event_open") can
provide cycle counter on the platforms that do not have
other kinds of cycle counters. But we don't use it so far.
ARM notes
---------
During tests on ARMv7 Debian, perf_even_open() based cycle counter provided
too low frequency with too high overhead:
MariaDB [performance_schema]> SELECT * FROM performance_timers;
+-------------+-----------------+------------------+----------------+
| TIMER_NAME | TIMER_FREQUENCY | TIMER_RESOLUTION | TIMER_OVERHEAD |
+-------------+-----------------+------------------+----------------+
| CYCLE | 689368159 | 1 | 970 |
| NANOSECOND | 1000000000 | 1 | 308 |
| MICROSECOND | 1000000 | 1 | 417 |
| MILLISECOND | 1000 | 1000 | 407 |
| TICK | 127 | 1 | 612 |
+-------------+-----------------+------------------+----------------+
Therefore, it was decided not to use perf_even_open() on ARM
(i.e. go without CYCLE and have "wait" events use NANOSECOND by default).
@return the current timer value, in cycles.
*/
ulonglong my_timer_cycles (void );
static inline ulonglong my_timer_cycles (void )
{
# if __has_builtin(__builtin_readcyclecounter)
return __builtin_readcyclecounter ();
# elif defined _WIN32 || defined __i386__ || defined __x86_64__
return __rdtsc ();
# elif defined(__INTEL_COMPILER) && defined(__ia64__) && defined(HAVE_IA64INTRIN_H)
return (ulonglong) __getReg (_IA64_REG_AR_ITC); /* (3116) */
#elif defined(__GNUC__) && defined(__ia64__)
{
ulonglong result;
__asm __volatile__ (" mov %0=ar.itc" " =r"
return result;
}
#elif defined __GNUC__ && defined __powerpc__
return __builtin_ppc_get_timebase ();
#elif defined(__GNUC__) && defined(__sparcv9) && defined(_LP64)
{
ulonglong result;
__asm __volatile__ (" rd %%tick,%0" " =r"
return result;
}
#elif defined(__GNUC__) && defined(__sparc__) && !defined(_LP64)
{
union {
ulonglong wholeresult;
struct {
ulong high;
ulong low;
} splitresult;
} result;
__asm __volatile__ (" rd %%tick,%1; srlx %1,32,%0" " =r" splitresult .high ), " =r" splitresult .low ));
return result.wholeresult ;
}
#elif defined(__GNUC__) && defined(__s390__)
/* covers both s390 and s390x */
{
ulonglong result;
__asm__ __volatile__ (" stck %0" " =Q" " cc"
return result;
}
#elif defined(HAVE_SYS_TIMES_H) && defined(HAVE_GETHRTIME)
/* gethrtime may appear as either cycle or nanosecond counter */
return (ulonglong) gethrtime ();
#else
return 0 ;
#endif
}
/* *
A namoseconds timer.
A nanosecond timer.
@return the current timer value, in nanoseconds.
*/
ulonglong my_timer_nanoseconds (void );
@@ -98,33 +204,22 @@ void my_timer_init(MY_TIMER_INFO *mti);
C_MODE_END
#define MY_TIMER_ROUTINE_ASM_X86 1
#define MY_TIMER_ROUTINE_ASM_X86_64 2
#define MY_TIMER_ROUTINE_RDTSCLL 3
#define MY_TIMER_ROUTINE_ASM_X86_WIN 4
#define MY_TIMER_ROUTINE_RDTSC 5
#define MY_TIMER_ROUTINE_ASM_IA64 6
#define MY_TIMER_ROUTINE_ASM_PPC 7
#define MY_TIMER_ROUTINE_SGI_CYCLE 8
#define MY_TIMER_ROUTINE_PPC_GET_TIMEBASE 7
#define MY_TIMER_ROUTINE_GETHRTIME 9
#define MY_TIMER_ROUTINE_READ_REAL_TIME 10
#define MY_TIMER_ROUTINE_CLOCK_GETTIME 11
#define MY_TIMER_ROUTINE_NXGETTIME 12
#define MY_TIMER_ROUTINE_GETTIMEOFDAY 13
#define MY_TIMER_ROUTINE_QUERYPERFORMANCECOUNTER 14
#define MY_TIMER_ROUTINE_GETTICKCOUNT 15
#define MY_TIMER_ROUTINE_TIME 16
#define MY_TIMER_ROUTINE_TIMES 17
#define MY_TIMER_ROUTINE_FTIME 18
#define MY_TIMER_ROUTINE_ASM_PPC64 19
#define MY_TIMER_ROUTINE_ASM_SUNPRO_SPARC64 20
#define MY_TIMER_ROUTINE_ASM_SUNPRO_SPARC32 21
#define MY_TIMER_ROUTINE_ASM_SUNPRO_I386 22
#define MY_TIMER_ROUTINE_ASM_GCC_SPARC64 23
#define MY_TIMER_ROUTINE_ASM_GCC_SPARC32 24
#define MY_TIMER_ROUTINE_MACH_ABSOLUTE_TIME 25
#define MY_TIMER_ROUTINE_GETSYSTEMTIMEASFILETIME 26
#define MY_TIMER_ROUTINE_ASM_SUNPRO_X86_64 27
#define MY_TIMER_ROUTINE_ASM_S390 28
#endif
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