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Building

RyBo edited this page Mar 1, 2019 · 1 revision

Run the Tcl Script

After cloning the repository, open Vivado and click Tools -> Run Tcl Script...

Select the vivado directory within this repository's root directory and click build.tcl

Vivado will now build the block design as well as generate the HDL wrapper.

In Vivado, Generate Bitstream.

Export the hardware:

File -> Export -> Export Hardware... Click Include Bistream

Launch the Xilinx SDK

File -> Launch SDK

In the Xilinx SDK, import the source code

File -> Import...

Projects from Git -> Existing local repository -> team6 -> next and finish

Generate the Board Support Packages

File -> New -> Board Support Package

Project Name: MB0_bsp

Hardware Platform: design_1_...

CPU: microblaze_0

Board Support Package OS: standalone

File -> New -> Board Support Package

Project Name: CPU0_bsp

Hardware Platform: design_1_...

CPU: ps7_cortexa9_0

Board Support Package OS: standalone

Set the run time configurations

Within the Project Explorer select the MB0 directory

Run -> Run Configurations...

Select Xilinx...(System Debugger)

Enable Program FPGA

Under Application, make sure microblaze_0 and ps7_cortexa9_0 have Download Application checked.

At this point everything should be ready to run.

Clone this wiki locally