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Turnip Adreno 710,720,722 v4.5

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@github-actions github-actions released this 25 Oct 03:28
· 2 commits to main since this release
4.5
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Experimental build based on Mesa (main branch).
Not officially supported — do not report issues to Mesa upstream.

Support

Changes in v4.5

  • Synced with the latest Mesa main branch

Driver Variants

  • Regular / Universal (Turnip-710-720-722-v4.5.zip):
    Universal build based directly on upstream Mesa for broad compatibility across different emulators and native applications.
  • Switch (Turnip-710-720-722-v4.5-sw.zip):
    Specifically tuned and optimized for Nintendo Switch emulators (Eden, etc.) on Adreno 7xx and 8xx.
  • Winlator (Turnip-710-720-722-v4.5-win.zip):
    Specifically tuned and optimized for Winlator and Windows/DirectX emulation environments on Android.

Environment Configuration (default_env.conf) (Optional)

Download: default_env.conf

File Placement

Save the downloaded default_env.conf file to:

  • Per-App Storage: /sdcard/Android/data/<package_name>/files/default_env.conf
    • Eden: /sdcard/Android/data/<package_name>/files/default_env.conf
    • Winlator: /sdcard/Android/data/com.winlator/files/default_env.conf
  • Global Fallback: /sdcard/default_env.conf

Note: Settings already active by default in the driver are commented out with #. You only need to remove the # or adjust the value if you want to override the driver's default behavior.

Build Info
Mesa 27.0.0-devel
Mesa commit 02f13375231b (2026-10-24)
Vulkan 1.4.363
Android NDK r29
Build date 2026-10-25

Applied Patches

Regular / Universal (Upstream)
  • 01-u_gralloc-always-use-ubwc-detection.patch — u_gralloc: always use the UBWC detection path
Switch (SW)
  • 01-u_gralloc-always-use-ubwc-detection.patch — u_gralloc: always use the UBWC detection path
  • 02-tu-lrz-reuse-dont-care-in-sysmem.patch — tu/lrz: reuse LRZ state for DONT_CARE depth when rendering in sysmem
  • 06-a8xx-cube-coord-sanitize.patch — ir3: Sanitize cube map directions on A8XX
  • 07-a8xx-kgsl-ib-vbo-alias.patch — tu/kgsl: Fetch A8XX command streams through a virtual BO
  • 08-tu-kgsl-cache-retired-a8xx-ib-storage.patch — tu/kgsl: Cache retired A8XX IB storage
  • 09-tu-ir3-subgroup-half-warp.patch — tu,ir3: Support a required subgroup size of half a wave
  • 11-wn-fix-a8xx-dev-info.py — Idempotent fixup for freedreno_dev_info.h and tu_cmd_buffer.cc
  • 12-wn-apply-a8xx-gpus.py — WN-Turnip A8xx GPU support applicator for freedreno_devices.py
  • 14-wn-apply-a7xx-gen2-ubwc-hint.py — WN-Turnip A7xx_gen2 UI-corruption fix for FD740 / Adreno X1-85
  • 15-wn-add-aimapper-gralloc.py — Add the IMapper5 stable-C gralloc backend (SP-HAL loaded) to Mesa
  • 16-wn-add-ubwc-swapchain-usage.py — Request UBWC-compressed swapchain buffers on Adreno
  • 17-wn-apply-perf-variant.py — Apply aggressive autotune and variant-specific GPU clock forcing for performance
  • 18-wn-a8xx-shared-mem.py — Robust equivalent of whitebelyash/mesa-unified turnip/gen8 commit
  • 20-default-env.py — Built-in default environment variables for Turnip with app override support
  • 30-tu-z-mutable.py — Turnip-Z port: keep MUTABLE_FORMAT images tiled (and UBWC) on all GPUs
  • 31-tu-z-lrz-rescue.py — Turnip-Z port: LRZ rescue on in-render-pass depth clears
  • 32-tu-z-texfast.py — Turnip-Z port: cheaper texture sampling
  • 33-tu-z-bgra-swap.py — Turnip-Z port: real color swap for B8G8R8A8 on tiled images
  • 36-tu-z-sysmem-only.py — Turnip-Z port: force sysmem rendering, and keep the bin-restore preamble
  • 37-tu-z-bgra-companion.py — Turnip-Z port: BGRA8 companion changes with multi-mode color swap support
  • 40-fd710-blob.py — FD710: consolidated hardware property and register tuning from Adreno 710 blob analysis (V@0615)
  • 48-a8xx-lrz-color-mask.py — A8xx: Emit GRAS_LRZ_COLOR_COMP_MASK (0x810c) in blend dynamic state
  • 50-fd720-blob.py — FD720: register tuning from Adreno 720 blob analysis (V@0676)
  • 51-fd810-blob.py — FD810: unified Adreno 810 hardware tuning from Vulkan blob trace analysis (V@0800.74)
  • 52-a8xx-resolve-cr-cntl.py — A8XX: Emit REG_A8XX_RB_RESOLVE_CR_CNTL=1 in preamble magic registers
  • 53-a8xx-lrz-bidir-disable.py — A8XX: Set FORCE_BI_DIR_LRZ_DISABLE in sysmem and disabled LRZ render passes
  • 54-a8xx-sp-hysteresis.py — A8XX: Initialize Shader Processor hysteresis thresholds in context preamble
  • 55-tu-lrz-dir-change-no-invalidate.py — Preserve LRZ state across draws on depth compare-op direction change
  • 56-fd722-blob.py — FD722: register tuning and hardware properties for Adreno 722 from Qualcomm blob analysis (chip_id 0x43020100)
  • 60-tu-sysmem-wfi-relax.py — Relax subpass slice wait from WFI to WAIT_FOR_ME in sysmem mode
  • 61-tu-lrz-fs-sideeffects-no-invalidate.py — Preserve LRZ state across draws when fragment shader has side effects
  • 62-tu-draw-state-skip-identical.py — Avoid redundant dynamic draw state packet emission
  • 63-ir3-sched-prefer-lower-live.py — Prioritize instructions with lower live register effect during pressure growth
  • 65-tu-z-shader-cache.py — Turnip-Z port: optional on-disk shader cache for Android emulators
Winlator / Windows (WIN)
  • 01-u_gralloc-always-use-ubwc-detection.patch — u_gralloc: always use the UBWC detection path
  • 02-tu-lrz-reuse-dont-care-in-sysmem.patch — tu/lrz: reuse LRZ state for DONT_CARE depth when rendering in sysmem
  • 06-a8xx-cube-coord-sanitize.patch — ir3: Sanitize cube map directions on A8XX
  • 07-a8xx-kgsl-ib-vbo-alias.patch — tu/kgsl: Fetch A8XX command streams through a virtual BO
  • 08-tu-kgsl-cache-retired-a8xx-ib-storage.patch — tu/kgsl: Cache retired A8XX IB storage
  • 09-tu-ir3-subgroup-half-warp.patch — tu,ir3: Support a required subgroup size of half a wave
  • 11-wn-fix-a8xx-dev-info.py — Idempotent fixup for freedreno_dev_info.h and tu_cmd_buffer.cc
  • 12-wn-apply-a8xx-gpus.py — WN-Turnip A8xx GPU support applicator for freedreno_devices.py
  • 14-wn-apply-a7xx-gen2-ubwc-hint.py — WN-Turnip A7xx_gen2 UI-corruption fix for FD740 / Adreno X1-85
  • 15-wn-add-aimapper-gralloc.py — Add the IMapper5 stable-C gralloc backend (SP-HAL loaded) to Mesa
  • 16-wn-add-ubwc-swapchain-usage.py — Request UBWC-compressed swapchain buffers on Adreno
  • 17-wn-apply-perf-variant.py — Apply aggressive autotune and variant-specific GPU clock forcing for performance
  • 18-wn-a8xx-shared-mem.py — Robust equivalent of whitebelyash/mesa-unified turnip/gen8 commit
  • 20-default-env.py — Built-in default environment variables for Turnip with app override support
  • 32-tu-z-texfast.py — Turnip-Z port: cheaper texture sampling
  • 40-fd710-blob.py — FD710: consolidated hardware property and register tuning from Adreno 710 blob analysis (V@0615)
  • 48-a8xx-lrz-color-mask.py — A8xx: Emit GRAS_LRZ_COLOR_COMP_MASK (0x810c) in blend dynamic state
  • 50-fd720-blob.py — FD720: register tuning from Adreno 720 blob analysis (V@0676)
  • 51-fd810-blob.py — FD810: unified Adreno 810 hardware tuning from Vulkan blob trace analysis (V@0800.74)
  • 56-fd722-blob.py — FD722: register tuning and hardware properties for Adreno 722 from Qualcomm blob analysis (chip_id 0x43020100)
  • 60-tu-sysmem-wfi-relax.py — Relax subpass slice wait from WFI to WAIT_FOR_ME in sysmem mode
  • 61-tu-lrz-fs-sideeffects-no-invalidate.py — Preserve LRZ state across draws when fragment shader has side effects
  • 62-tu-draw-state-skip-identical.py — Avoid redundant dynamic draw state packet emission
  • 63-ir3-sched-prefer-lower-live.py — Prioritize instructions with lower live register effect during pressure growth
  • 7c14092ffb50622f78f9c466d92f2a6c0fce71a7.patch — ir3: Only prefetch UBO descriptors
  • ec5a9a6d86133c45d3e42bd3583ba3ad9572c3a2.patch — ir3: Remove texture descriptor prefetch support
  • tu-sample-shading-gate.patch — tu: only force per-sample interpolation for shaders that use it

Upstream Freedreno Changes Since 4.4-exp

38 commits under src/freedreno, grouped by commit title.

A7xx (1)
  • 73c57838da freedreno/ci: lower the a702 job timeouts
Turnip (tu) (17)
  • 8aa6218125 tu: Restore old predicated binning workaround for a630_sqe.fw
  • e14789a70e tu: Report unsigned and mixed 4x8 dot acceleration with dp4acc
  • f0bc8697b5 tu: Mark signed 4x8 integer dot products as accelerated
  • fe3e563ceb tu: Set prefer_gmem for Sweet Surrender VR
  • 7e29b87af3 tu: Prefer GMEM on Beat Saber
  • 64245a20b7 tu: Add back float16 3D path for multisampled copies
  • a1e9f88842 tu/kgsl: Fix BDA capture/replay failures due to deferred VA frees
  • a799b0baca tu: Apply tu_enable_ssbo_emulation workaround to all UE5 games
  • 69f1f21f02 tu: upload draw_id_offset through driver_params UBO
  • 9a7372e8f7 tu: split VS driver params constants setup and emission
  • fd5a6795e3 tu: rename skip_vfd to indirect in struct tu_vs_params
  • 7638039f12 tu: Split large indirect count draws on A8xx
  • 14656cee8c tu: Split large indirect draws on A8xx
  • cadc7e42fb tu/a6xx: Invalidate shared consts before disabling them
  • af60682ce5 tu: modify hull shader programming
  • 4f6314dc9c tu: Drop reference taken with get_vis_stream_patchpoint_cs()
  • 761d5c8a54 tu/a6xx: Set correct value for GRAS_MODE_CNTL
Compiler (ir3) (11)
  • ed2b00fa28 ir3: assemble the block copy between global memory and local
  • 42177b5f4f ir3: decode the block copy between global memory and local
  • 8d2fe6ed62 ir3: implement global atomics on a5xx
  • fe46ccc999 ir3: implement global load/store for a5xx
  • ae42351705 ir3: move the ldg/stg offset handling to a header
  • b8141939d2 ir3: print the half prefix on local and private load/store
  • 05950e40bf ir3: reserve image dimensions for read-write images on a5xx
  • 07fd8b3603 ir3: keep a5xx shaders below the descriptor window in the constant file
  • 7656cf464d ir3: do not let full-register writes reset half-register delays before a6xx
  • 29db4909d4 ir3/ra: fix DOUBLE_ONLY register limit unit
  • 1ae1558b89 ir3: lower draw_id to use draw_id_offset
Other (9)
  • 02f1337523 mesa: don't read past the name when matching a resource without its [0]
  • ca442f8209 freedreno/a5xx: swap components when storing to an image
  • 724b21ef16 freedreno/a5xx: let half arithmetic overflow to infinity
  • 07f52057ca freedreno/a5xx: decompose strips and fans in the D3D order for the first-vertex convention
  • e5c0aa8e52 freedreno/a5xx: keep hardware-binned bins below 1024 rows
  • 57fea5146f ci/lava: uprev lava-job-submitter
  • d1337cf9f7 freedreno/ci: reenable dEQP UBO tests
  • 0e8f40efb0 freedreno: Fixup incorrectly copied A6XX_TPL1_DBG_ECO_CNTL for A650
  • d1526c1885 freedreno/devices: Add the Adreno 829 msm chip id

GPU Support

Supports all GPUs currently supported by Mesa, including Adreno 6xx, 7xx, and 8xx series.
For the complete and up-to-date device list, see:
https://gitlab.freedesktop.org/mesa/mesa/-/blob/main/src/freedreno/common/freedreno_devices.py

Notes

  • Graphics issues may still occur depending on the game or emulator.
  • Performance and compatibility vary by device, firmware, emulator version, and game.
  • Recommended memory mode: sysmem (TU_DEBUG=sysmem).
  • Experimental build.

Credits

Special thanks to whitebelyash, Leb-Sun, Max Jividen (MaxsTechReview), Alex Sanz (AlexSanz0902), Dhruv Mark Collins, Hugo223, and StevenMX

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