Repository navigation
Xezim Performance Optimization: Constrained Random Value Generation (IEEE 1800-2017 §18) #876
Replies: 3 comments
Randomization Grind - Test Case 2Sample Test Case for Randomization Grind (tb_rand_grind_01.sv)module mwe_rand_chunked ;
parameter int CHUNK_SIZE = 8192 ;
int unsigned chunk [CHUNK_SIZE] ;
int unsigned offsets [] ;
int lim = 128 ;
int start = 3 ;
int n_chunk_m1 ;
int last_len ;
int lo_cnt = 0 ;
int failures = 0 ;
task automatic chk(bit ok, string msg);
if (!ok) begin
failures++ ;
$display("FAIL : %s", msg) ;
end
endtask
initial begin
offsets = new [100000] ;
n_chunk_m1 = $ceil(real'(100000)/CHUNK_SIZE) - 1 ;
for (int ci = 0; ci <= n_chunk_m1; ci++) begin
if (std::randomize(chunk) with {
foreach (chunk[i]) {
chunk[i] dist { [0:lim] :/ 9, [lim:2*lim] :/ 2 } ;
chunk[i] < 255 ;
(chunk[i]) inside { [0 : 255] } ;
(chunk[i] + start) inside { [0 : 255] } ;
}
}) begin
last_len = (ci == n_chunk_m1) ? (100000 % CHUNK_SIZE) : CHUNK_SIZE ;
if (last_len == 0) last_len = CHUNK_SIZE ;
for (int j = 0; j < last_len; j++)
offsets[ci*CHUNK_SIZE + j] = chunk[j] ;
end else begin
chk(0, "chunk randomize returned 0 (spurious)") ;
end
end
foreach (offsets[i]) begin
if (offsets[i] > 255 || (offsets[i] + start) > 255)
chk(0, "value outside [0:255]") ;
if (offsets[i] <= lim) lo_cnt++ ;
end
$display("low-half count = %0d of 100000 (dist 9:2 -> expect ~81818)", lo_cnt) ;
if (failures == 0) $display("TEST_PASS");
else begin $display("TEST_FAIL count=%0d", failures); $fatal(1); end
$finish ;
end
endmoduleI will use the table below to track the performance for this particular testcase. Simulation Time for tb_rand_grind_01.sv on a Noise-Free Xeon W-1290P
*Relative to target multiple (assuming that a 2x reference simulator runtime of 6s is acceptable). |
|
Another direction worth exploring might be UniGen2/UniGen3 and DV-Solve (through PyVSC). Here are some relevant references:
DV-Solve introduction: https://bitsbytesgates.com/blog/dv-solve-intro/ DV-Solve is particularly interesting because it targets constrained-random stimulus generation. Its hybrid approach combines bounds propagation and search with a SAT-based fallback. PyVSC also provides a pluggable solver backend, making it possible to compare the existing Boolector backend with DV-Solve.
UniGen source: https://github.com/meelgroup/unigen These are worth investigating if sampling quality and distribution diversity are concerns. UniGen uses hashing-based techniques to generate almost-uniform SAT solutions. One caveat is that UniGen targets Boolean SAT formulas. Supporting SystemVerilog-specific semantics such as weighted dist, solve...before, and other constraint constructs would require a suitable translation layer.
It would be interesting to benchmark these approaches against the existing implementation using the testcases in this discussion. Some metrics worth comparing: Randomization throughput and memory consumption. My preference would be to start with DV-Solve/PyVSC as a practical benchmark and investigate UniGen2/3 separately as alternative sampling approaches. Perhaps the DV-Solve architecture could also provide useful ideas for optimizing Xezim's native constraint solver, even without directly integrating another backend. |
|
with #955 I achieve: |
Uh oh!
There was an error while loading. Please reload this page.
Uh oh!
There was an error while loading. Please reload this page.
Constrained randomization is a core feature of SystemVerilog.
The nature of the solver engine built into the simulator has a direct impact on simulation performance - both time and memory consumption.
I would like to start this discussion to discuss different testcases that simulate correctly with Xezim (not belonging to the 'Issues' section, as such), but have sub-optimal performance.
If you are an Xezim user encountering problems with constrained randomization performance on production / industry-grade testbenches, please consider adding MWEs in this discussion for the benefit of the project.
I will start off with the first testcase that has been created based on one of our production testbenches.
Randomization Grind - Test Case 1
EDA Playground Link
This reports TEST_PASS on two of the Big 3 simulators, and times out on the third (likely because it doesn't consider variable ordering hints utilizing fields of packed structs)
Sample Test Case for Randomization Grind (tb_rand_grind_00.sv)
I will use the table below to track the performance for this particular testcase.
Simulation Time for tb_rand_grind_00.sv on a Noise-Free Xeon W-1290P
*Relative to target multiple (assuming that a 2x reference simulator runtime of 4s is acceptable).
All reactions