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@lyakh lyakh commented Oct 19, 2020

Fixing UP2 / Apollolake. Reverting one of your patches is only needed partially, as explained in the commit message. The other patch is still needed - SOF does need aligned allocations and your patches re-introduced the respective Kconfig option and it is indeed needed for SOF, without it audio is failing on UP2.

lyakh added 2 commits October 19, 2020 15:08
Actually only the last two hunks of this commit have to be reverted,
they are unrelated to GPIOs and they are needed for SOF. Reverting
the complete commit for now until it is fixed.

This reverts commit e4d9389.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
SOF has to force aligned memory allocation and a single processor core
execution for now.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
@lyakh lyakh requested a review from andyross as a code owner October 19, 2020 13:51
andyross pushed a commit that referenced this pull request Nov 9, 2020
The _ldiv5() is an optimized divide-by-5 function that is smaller and
faster than the generic libgcc implementation.

Yet it can be made even smaller and faster with this replacement
implementation based on a reciprocal multiplication plus some tricks.

For example, here's the assembly from the original code on ARM:

_ldiv5:
        ldr     r3, [r0]
        movw    ip, zephyrproject-rtos#52429
        ldr     r1, [r0, #4]
        movt    ip, 52428
        adds    r3, r3, #2
        push    {r4, r5, r6, r7, lr}
        mov     lr, #0
        adc     r1, r1, lr
        adds    r2, lr, lr
        umull   r7, r6, ip, r1
        lsr     r6, r6, #2
        adc     r7, r6, r6
        adds    r2, r2, r2
        adc     r7, r7, r7
        adds    r2, r2, lr
        adc     r7, r7, r6
        subs    r3, r3, r2
        sbc     r7, r1, r7
        lsr     r2, r3, #3
        orr     r2, r2, r7, lsl zephyrproject-rtos#29
        umull   r2, r1, ip, r2
        lsr     r2, r1, #2
        lsr     r7, r1, zephyrproject-rtos#31
        lsl     r1, r2, #3
        adds    r4, lr, r1
        adc     r5, r6, r7
        adds    r2, r1, r1
        adds    r2, r2, r2
        adds    r2, r2, r1
        subs    r2, r3, r2
        umull   r3, r2, ip, r2
        lsr     r2, r2, #2
        adds    r4, r4, r2
        adc     r5, r5, #0
        strd    r4, [r0]
        pop     {r4, r5, r6, r7, pc}

And here's the resulting assembly with this commit applied:

_ldiv5:
        push    {r4, r5, r6, r7}
        movw    r4, zephyrproject-rtos#13107
        ldr     r6, [r0]
        movt    r4, 13107
        ldr     r1, [r0, #4]
        mov     r3, #0
        umull   r6, r7, r6, r4
        add     r2, r4, r4, lsl #1
        umull   r4, r5, r1, r4
        adds    r1, r6, r2
        adc     r2, r7, r2
        adds    ip, r6, r4
        adc     r1, r7, r5
        adds    r2, ip, r2
        adc     r2, r1, r3
        adds    r2, r4, r2
        adc     r3, r5, r3
        strd    r2, [r0]
        pop     {r4, r5, r6, r7}
        bx      lr

So we're down to 20 instructions from 36 initially, with only 2 umull
instructions instead of 3, and slightly smaller stack footprint.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
@lyakh lyakh closed this Feb 10, 2021
andyross pushed a commit that referenced this pull request Mar 19, 2021
Added function to calculate channel identifier value
required for Channel Selection Algorithm #2.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
andyross pushed a commit that referenced this pull request Mar 31, 2021
The fatal log now contains
- Trap type in human readable representation
- Integer registers visible to the program when trap was taken
- Special register values such as PC and PSR
- Backtrace with PC and SP

If CONFIG_EXTRA_EXCEPTION_INFO is enabled, then all the above is
logged. If not, only the special registers are logged.

The format is inspired by the GRMON debug monitor and TSIM simulator.
A quick guide on how to use the values is in fatal.c.

It now looks like this:

E: tt = 0x02, illegal_instruction
E:
E:       INS        LOCALS     OUTS       GLOBALS
E:   0:  00000000   f3900fc0   40007c50   00000000
E:   1:  00000000   40004bf0   40008d30   40008c00
E:   2:  00000000   40004bf4   40008000   00000003
E:   3:  40009158   00000000   40009000   00000002
E:   4:  40008fa8   40003c00   40008fa8   00000008
E:   5:  40009000   f3400fc0   00000000   00000080
E:   6:  4000a1f8   40000050   4000a190   00000000
E:   7:  40002308   00000000   40001fb8   000000c1
E:
E: psr: f30000c7   wim: 00000008   tbr: 40000020   y: 00000000
E:  pc: 4000a1f4   npc: 4000a1f8
E:
E:       pc         sp
E:  #0   4000a1f4   4000a190
E:  #1   40002308   4000a1f8
E:  #2   40003b24   4000a258

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
andyross pushed a commit that referenced this pull request May 5, 2021
Reorder Channel Selection Algorithm #2 and Minimum Number of
Used Channels Procedure bits.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
andyross pushed a commit that referenced this pull request Aug 5, 2021
Implement the functions required to calculate the SubEvent 1
and SubEvent n mapped channel indices.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
andyross pushed a commit that referenced this pull request Aug 5, 2021
Added Bluetooth Specification references to the
implementation of Channel Selection algorithm #2 in the
Controller.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
andyross pushed a commit that referenced this pull request Oct 8, 2021
Remove explicit disable of Channel Selection Algorithm #2
in the mesh tests that use Extended Advertising.

Fixes zephyrproject-rtos#39188.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
lyakh pushed a commit to lyakh/zephyr that referenced this pull request Jun 26, 2025
Add possibility to perform crop on all pipes and compose (downscale) on
pixel pipes (endpoint #1 and endpoint andyross#2).
Rework the code in order to move the downscale control from
the set_fmt into the set_selection (compose).

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
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