DDR5: Improve timing in S7CRG #939
ci.yml
on: push
Matrix: build
Waiting for pending jobs
Matrix: DDR5 tests
Waiting for pending jobs
Matrix: DDR5 Verilator tests
Waiting for pending jobs
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1 error
Invalid workflow file:
.github/workflows/ci.yml#L268
The workflow is not valid. .github/workflows/ci.yml (Line: 268, Col: 9): 'if' is already defined .github/workflows/ci.yml (Line: 269, Col: 9): 'run' is already defined
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