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riscv: Add more debug related CSR definitions #12118

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merged 1 commit into from
Apr 10, 2024
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@no1wudi no1wudi commented Apr 10, 2024

Summary

This patch adds more debug related CSR definitions to arch/risc-v/include/csr.h.

These definitions are from the RISC-V Debug Specification Version 1.0 rc1 (https://github.com/riscv/riscv-debug-spec).

Impact

None, new register/opcode definition

Testing

CI

This patch adds more debug related CSR definitions
to arch/risc-v/include/csr.h.

These definitions are from the RISC-V Debug Specification
Version 1.0 rc1 (https://github.com/riscv/riscv-debug-spec).

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
@anchao anchao merged commit 9e78b23 into apache:master Apr 10, 2024
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3 participants