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Add cache flush for arm #9170

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merged 2 commits into from
Oct 2, 2021
Merged

Add cache flush for arm #9170

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Add cache flush for arm
merrymercy Jun 5, 2021
8fd5846
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tkonolige Sep 30, 2021
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19 changes: 17 additions & 2 deletions src/runtime/rpc/rpc_module.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -320,18 +320,33 @@ std::shared_ptr<RPCSession> RPCModuleGetSession(Module mod) {
* which leads to lower performance.
*/
inline void CPUCacheFlushImpl(const char* addr, unsigned int len) {
// TODO(FrozenGene): Support ARM.
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Maybe we should leave this TODO as we haven't completed support for arm 32 bits.

#if (defined(_M_X64) || defined(__x86_64__))
#if (defined(_M_X64) || defined(__x86_64__) || defined(__aarch64__))

#if defined(__aarch64__)
size_t ctr_el0 = 0;
asm volatile("mrs %0, ctr_el0" : "=r"(ctr_el0));
const size_t cache_line = 4 << ((ctr_el0 >> 16) & 15);
#else
const size_t cache_line = 64;
#endif

if (addr == nullptr || len <= 0) {
return;
}

for (uintptr_t uptr = (uintptr_t)addr & ~(cache_line - 1); uptr < (uintptr_t)addr + len;
uptr += cache_line) {
#if defined(__aarch64__)
asm volatile("dc civac, %0\n\t" : : "r"(reinterpret_cast<const void*>(uptr)) : "memory");
#else
_mm_clflush(reinterpret_cast<const void*>(uptr));
#endif
}

#if defined(__aarch64__)
asm volatile("dmb ishst" : : : "memory");
#endif

#endif
}

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