feat(plc): add tac_e400 profile on smp1

configs/vms/arceos-aarch64-tac_e400-smp1.dts

@@ -0,0 +1,155 @@
+/dts-v1/;
+
+/memreserve/	0x0000000080000000 0x0000000000010000;
+/ {
+	compatible = "phytium,pe2204";
+	interrupt-parent = <0x01>;
+	#address-cells = <0x02>;
+	#size-cells = <0x02>;
+	model = "Phytium Pi Board";
+
+	// memory@01 {
+	// 	device_type = "memory";
+	// 	reg = <0x20 0x00 0x00 0x80000000>;
+	// 	numa-node-id = <0x00>;
+	// };
+
+	aliases {
+		serial1 = "/soc/uart@2800d000";
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+		cpu_suspend = <0xc4000001>;
+		cpu_off = <0x84000002>;
+		cpu_on = <0xc4000003>;
+		sys_poweroff = <0x84000008>;
+		sys_reset = <0x84000009>;
+	};
+
+	cpus {
+		#address-cells = <0x02>;
+		#size-cells = <0x00>;
+
+		cpu-map {
+
+			// cluster0 {
+
+			// 	core0 {
+			// 		cpu = <0x05>;
+			// 	};
+			// };
+
+			// cluster1 {
+
+			// 	core0 {
+			// 		cpu = <0x06>;
+			// 	};
+			// };
+
+			cluster2 {
+
+				core0 {
+					cpu = <0x07>;
+				};
+
+				// core1 {
+				// 	cpu = <0x08>;
+				// };
+			};
+		};
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "phytium,ftc310\0arm,armv8";
+			reg = <0x00 0x200>;
+			enable-method = "psci";
+			clocks = <0x09 0x02>;
+			capacity-dmips-mhz = <0xb22>;
+			phandle = <0x07>;
+		};
+
+		// cpu@1 {
+		// 	device_type = "cpu";
+		// 	compatible = "phytium,ftc310\0arm,armv8";
+		// 	reg = <0x00 0x201>;
+		// 	enable-method = "psci";
+		// 	clocks = <0x09 0x02>;
+		// 	capacity-dmips-mhz = <0xb22>;
+		// 	phandle = <0x08>;
+		// };
+
+		// cpu@100 {
+		// 	device_type = "cpu";
+		// 	compatible = "phytium,ftc664\0arm,armv8";
+		// 	reg = <0x00 0x00>;
+		// 	enable-method = "psci";
+		// 	clocks = <0x09 0x00>;
+		// 	capacity-dmips-mhz = <0x161c>;
+		// 	phandle = <0x05>;
+		// };
+
+		// cpu@101 {
+		// 	device_type = "cpu";
+		// 	compatible = "phytium,ftc664\0arm,armv8";
+		// 	reg = <0x00 0x100>;
+		// 	enable-method = "psci";
+		// 	clocks = <0x09 0x01>;
+		// 	capacity-dmips-mhz = <0x161c>;
+		// 	phandle = <0x06>;
+		// };
+	};
+
+	interrupt-controller@30800000 {
+		compatible = "arm,gic-v3";
+		#interrupt-cells = <0x03>;
+		#address-cells = <0x02>;
+		#size-cells = <0x02>;
+		ranges;
+		interrupt-controller;
+		reg = <0x00 0x30800000 0x00 0x20000 0x00 0x30880000 0x00 0x80000 0x00 0x30840000 0x00 0x10000 0x00 0x30850000 0x00 0x10000 0x00 0x30860000 0x00 0x10000>;
+		interrupts = <0x01 0x09 0x08>;
+		phandle = <0x01>;
+
+		gic-its@30820000 {
+			compatible = "arm,gic-v3-its";
+			msi-controller;
+			reg = <0x00 0x30820000 0x00 0x20000>;
+			phandle = <0x0f>;
+		};
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <0x01 0x0d 0x08 0x01 0x0e 0x08 0x01 0x0b 0x08 0x01 0x0a 0x08>;
+		clock-frequency = <0x2faf080>;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <0x02>;
+		#size-cells = <0x02>;
+		dma-coherent;
+		ranges;
+
+		uart@2800d000 {
+			compatible = "arm,pl011\0arm,primecell";
+			reg = <0x00 0x2800d000 0x00 0x1000>;
+			interrupts = <0x00 0x54 0x04>;
+			clocks = <0x0c 0x0c>;
+			clock-names = "uartclk\0apb_pclk";
+			status = "okay";
+		};
+	};
+
+	chosen {
+		bootargs = "console=ttyAMA1,115200 earlycon=pl011,0x2800d000 root=/dev/sda2 rootfstype=ext4 rootwait  rw cma=256m ;";
+		stdout-path = "serial1:115200n8";
+	};
+
+	memory@00 {
+		device_type = "memory";
+		reg = <0x20 0x20000000 0x00 0x20000000>;
+	};
+};

configs/vms/arceos-aarch64-tac_e400-smp1.toml

@@ -0,0 +1,71 @@
+# Vm base info configs
+#
+[base]
+# Guest vm id.
+id = 2
+# Guest vm name.
+name = "arceos"
+# Virtualization type.
+vm_type = 1
+# The number of virtual CPUs.
+cpu_num = 1
+# The physical CPU ids.
+phys_cpu_ids = [0x200]
+# Guest vm physical cpu sets.
+phys_cpu_sets = [1]
+
+#
+# Vm kernel configs
+#
+[kernel]
+# The entry point of the kernel image.
+entry_point = 0x20_2008_0000
+# The location of image: "memory" | "fs".
+# Load from file system.
+image_location = "memory"
+# The load address of the kernel image.
+kernel_load_addr = 0x20_2008_0000
+## The file path of the kernel image.
+kernel_path = "/path/to/arceos_aarch64-dyn_smp1.bin"
+## The file path of the device tree blob (DTB).
+dtb_load_addr = 0x20_2000_0000
+dtb_path = "/path/to/arceos-aarch64-tac_e400-smp1.dtb"
+# Memory regions with format (`base_paddr`, `size`, `flags`, `map_type`).
+# For `map_type`, 0 means `MAP_ALLOC`, 1 means `MAP_IDENTICAL`.
+memory_regions = [
+  [0x20_2000_0000, 0x2000_0000, 0x7, 1], # System RAM MAP_IDENTICAL
+]
+
+#
+# Device specifications
+#
+[devices]
+# Emu_devices.
+# Name Base-Ipa Ipa_len Alloc-Irq Emu-Type EmuConfig.
+emu_devices = []
+
+# Pass-through devices.
+# Name Base-Ipa Base-Pa Length Alloc-Irq.
+passthrough_devices = [
+    [
+        "UART1",
+        0x2800_d000,
+        0x2800_d000,
+        0x1000,
+        0x1,
+    ],
+    [
+        "gic-v3",
+        0x3080_0000,
+        0x3080_0000,
+        0x10000,
+        0x1,
+    ],
+    [
+        "gic-v3-its",
+        0x3082_0000,
+        0x3082_0000,
+        0x100000,
+        0x1,
+    ],
+]