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Instruction Set
azya52 edited this page Dec 27, 2022
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| Mnemonic | Opcode | Hex | Execution | Z | C | Description |
|---|---|---|---|---|---|---|
| ADD Rd, Rs | 0000 00dd ddds ssss |
0000‑03FF |
Rd ← Rd + Rs | - | C | Adds two registers and stores the result in the destination register Rd |
| ADB Rd, Rs | 0000 01dd ddds ssss |
0400-07FF |
Rd ← to10(Rd + Rs); C ← (Rd + Rs) > 9 |
- | C | Adds two registers, decimal adjusts result and stores it in the destination register Rd |
| SUB Rd, Rs | 0000 10dd ddds ssss |
0800-0BFF |
Rd ← Rd - Rs | Z | C | Subtracts two registers and stores the result in the destination register Rd |
| SBB Rd, Rs | 0000 11dd ddds ssss |
0C00-0FFF |
Rd ← to10(Rd - Rs); C ← (Rs - Rd) % 16 > 9 |
Z | C | Subtracts two registers, decimal adjusts result and stores it in the destination register Rd |
| ADI R, I | 0001 00RR RRRI III- |
1000-13FF |
R ← R + I | - | C | |
| ADBI R, I | 0001 01RR RRRI III- |
1400-17FF |
R ← to10(R + I) | - | C | |
| SBI R, I | 0001 10RR RRRI III- |
1800-1BFF |
R ← R - I | Z | C | |
| SBBI R, I | 0001 11RR RRRI III- |
1C00-1FFF |
R ← to10(R - I) | Z | C | |
| ADM Rd, Rs | 0010 00dd ddds ssss |
2000-23FF |
(Rd+k … Rd+1, Rd) ← (Rd+k … Rd+1, Rd) + (Rs, Rs-1 … Rs-k); k = ((Rs-Rd) % 8) | - | C | |
| ADBM Rd, Rs | 0010 01dd ddds ssss |
2400-27FF |
[Rd .. R(d+k)] ← to10([Rd .. R(d+k)] + [R(s-k) .. Rs]); k = s%8 - d%8; R((i+1)/8) == R(i/8) |
- | C | Adds two registers range in BCD format. Sources and result in little-endian BCD. |
| SBM Rd, Rs | 0010 10dd ddds ssss |
2800-2BFF |
(Rd+k … Rd+1, Rd) ← (Rd+k … Rd+1, Rd) - (Rs, Rs-1 … Rs-k); k = ((Rs-Rd) % 8) | Z | C | |
| SBBM Rd, Rs | 0010 11dd ddds ssss |
2C00-2FFF |
(Rd+k … Rd+1, Rd) ← to10((Rd+k … Rd+1, Rd) - (Rs, Rs-1 … Rs-k)); k = ((Rs-Rd) % 8) | Z | C | |
| CMP Rd, Rs | 0011 00dd ddds ssss |
3000-33FF |
Rd - Rs; С←(Rd<Rs) Z←(Rd=Rs) | Z | C | |
| CPM Rd, Rs | 0011 01dd ddds ssss |
3400-37FF |
(Xn+k … Xn+1 Xn) - (Rn Rn-1 … Rn-k); k = (Y - X%8); С←(X<R) Z←(X=R) | Z | C | |
| CPI R, I | 0011 10RR RRRI III- |
3800-3BFF |
R - I; С←(R<I) Z←(R=I) | Z | C | |
| LCRB | 0011 110- ---B B--- |
3C00-3C18 |
curent_bank ← B | - | - | |
| LARB | 0011 111- ---B B--- |
3E00-3E18 |
additional_bank ← B | - | - | |
| ANDI R, I | 0100 00RR RRRI III- |
4000-43FF |
R ← R AND I | Z | - | |
| ORI R, I | 0100 01RR RRRI III- |
4400-47FF |
R ← R OR I | - | - | |
| XORI R, I | 0100 10RR RRRI III- |
4800-4BFF |
R ← R XOR I | - | - | |
| INC R, r | 0100 11RR RRR0 0rrr |
4C00-4FE7 |
(r … R) ← (r … R) + 1 | - | C | |
| INCB R, r | 0100 11RR RRR0 1rrr |
4C08-4FEF |
(r … R) ← to10((r … R) + 1) | - | C | |
| DEC R, r | 0100 11RR RRR1 0rrr |
4С10-4FF7 |
(r … R) ← (r … R) - 1 | Z | C | |
| DECB R, r | 0100 11RR RRR1 1rrr |
4C18-4FFF |
(r … R) ← to10((r … R) - 1) | Z | C | |
| RSHM R, r | 0101 00RR RRR- 0rrr |
5000-53FF |
R ← (R-1) … r ← (r-1) | - | - | |
| LSHM R, r | 0101 00RR RRR- 1rrr |
5000-53FF |
r ← (r+1) … R ← (R+1) | - | - | |
| IN Rd, IOs | 0101 01dd ddd- ssss |
5400-57FF |
Rd ← IOs | - | - | |
| OUT IOd, Rs | 0101 10ss sss- dddd |
5800-5BFF |
IOd ← Rs | |||
| OUTI IOd, I | 0101 11ii ii-- dddd |
5C00-5FFF |
IOd ← I | |||
| PSAM R, r | 0110 00RR RRR0 -rrr |
6000-63EF |
SA ← (r … R); r-R>=2 | - | - | |
| PLAM R, r | 0110 00RR RRR1 -rrr |
6010-63FF |
LA ← (r … R); r-R>=1 | - | - | |
| LDSM R, r | 0110 01RR RRR- 1rrr |
6408-6FEF |
(R..r) ← (SA)SRAM; SA ← SA+(r-(R % 8)) | - | - | |
| STSM R, r | 0110 01RR RRR- 0rrr |
6400-6FFF |
(SA)SRAM ← (R..r); SA ← SA+(r-(R % 8)) | - | - | |
| STLM R, r | 0110 10RR RRR- -rrr |
6800-6BFF |
(LA)LCDRAM←(R … r); LA←LA+(r-(R % 8)) | - | - | |
| STL R | 0110 11ss sss- ---- |
6C00-6FE0 |
(LA)LCDRAM ← Rs + 0x30 LA ← LA+1 |
- | - | |
| PSAI I | 0111 0iii iiii iiii |
7000-77FF |
SA ← i | - | - | |
| PLAI I | 0111 10ii iii- -iii |
7800-7BE7 |
LA ← i | - | - | |
| STLS | 0111 11-- ---0 0--- |
7C00-7FE7 |
(LA) ← (SA) LA ← LA+1 SA ← SA+1 |
- | - | |
| STLSA I | 0111 11ii iii0 1iii |
7C08-7FEF |
(I)LCDRAM ← (SA) SA ← SA+1 |
- | - | |
| STLI I | 0111 11ii iii1 0iii |
7C10-7FF7 |
(LA)LCDRAM ← i LA ← LA+1 |
- | - | |
| STLIA I | 0111 11ii iii1 1iii |
7C18-7FFF |
(I)LCDRAM ← i | - | - | |
| MOV Rd, Rs | 1000 00dd ddds ssss |
8000-83FF |
Rd ← Rs | - | - | |
| MOVM Rd, Rs | 1000 01dd ddds ssss |
8400-87FF |
(X … X+(R % 8)) ← (R-(X % 8) … R) | - | - | |
| LDI R, I | 1000 10RR RRRI III- |
8800-8BFF |
Rn ← I | - | - | |
| CLRM R, r | 1000 11RR RRR- -rrr |
8C00-8FFF |
(R … r) ← 0 | - | - | |
| MVAC E, R | 1001 00EE EEER RRRR |
9000-93FF |
A( E ) ← C( R ) | - | - | |
| MVACM E, R | 1001 01EE EEER RRRR |
9400-97FF |
A(E … E+(R % 8)) ← C(R-(E % 8) … R) | - | - | |
| MVCA R, E | 1001 10RR RRRE EEEE |
9800-9BFF |
C( R ) ← A( E ) | - | - | |
| MVCAM R, E | 1001 11RR RRRE EEEE |
9C00-9FFF |
C(R … R+(E % 8)) ← A(E-(R % 8) … E) | - | - | |
| CALL A | 1010 AAAA AAAA AAAA |
A000-AFFF |
PC ← A; STACK ← PC+1 | - | - | |
| RET | 1011 0000 0000 0000 |
B000 |
PC ← STACK | - | - | |
| CPFJR R,a | 1011 01RR RRRa aaaa |
B400-B7FF |
if (R=4) PC ← PC+a | - | - | |
| IJMR R | 1011 10RR RRR- ---- |
B800-BBFF |
PC ← PC + R | - | - | |
| WFE | 1011 11-- ---- ---- |
BC00-BFFF |
IF (IO0 != 0) PC ← PC + 1 | - | - | Wait for Event |
| JMP A | 1100 AAAA AAAA AAAA |
C000-СFFF |
PC ← A | - | - | |
| JZ A | 1101 00AA AAAA AAAA |
D000-D3FF |
if (Z=1) PC ← A+0xC00 | - | - | |
| JNZ A | 1101 01AA AAAA AAAA |
D400-D7FF |
if (Z=0) PC ← A+0xC00 | - | - | |
| JC A | 1101 10AA AAAA AAAA |
D800-DBFF |
if (C=1) PC ← A+0xC00 | - | - | |
| JNC A | 1101 11AA AAAA AAAA |
DC00-DFFF |
if (C=0) PC ← A+0xC00 | - | - | |
| BTJR R,I,a | 1110 IIRR RRRa aaaa |
E000-EFFF |
if (R.b(I)) PC ← PC+a | - | - | |
| CPJR R,I,a | 1111 IIRR RRRa aaaa |
F000-FFFF |
if (R=I) PC ← PC+a | - | - |