v0.4.1

hessboost v0.4.1

Patch release speeding up single-row x86_64 inference by 28% by pinning the tree row-walk step to cmp + adc, alongside development tooling updates. No breaking changes.

Full Changelog: v0.4.0...v0.4.1

Highlights Since v0.4.0

Performance

• Faster single-row inference on x86_64 (#173): simd::step_if_greater now uses an x86_64 inline-assembly path (cmp + adc) mirroring AArch64's cmp + cinc, while other architectures retain the plain select. Previously, LLVM's SLP vectorizer compiled the eight-tree lockstep walk in RowForest::complete_leaves into AVX2 lane arithmetic with vpinsrd/vmovq transfers around vpaddq; pinning the step keeps lanes in general-purpose registers. On an EC2 c6in.xlarge (Xeon Platinum 8375C, single thread, -C target-cpu=x86-64-v3, squared error, 400 depth-6 trees, 24 features, 8,192 rows, best of 9 runs), predict_margin_row_into drops from 4.13–4.16 µs/row to 2.99–3.01 µs/row (−28%), while batch DMatrix predict is unchanged at 1.79–1.83 → 1.77–1.82 µs/row. Outputs remain bit-identical to the previous build and to AArch64.

Tooling

• Development dependency updates (#174): Updated mise tooling versions (rust 1.99.0 → 1.99.1, mr-boxington 1.22.0 → 1.26.0, uv 0.13.1 → 0.13.4, cargo-binstall 1.25.2 → 1.26.0, cargo-nextest 0.9.146 → 0.9.149, ruff 0.16.10 → 0.17.1) with no changes to runtime or library behavior.

Pull Requests by Category

Performance

• perf(simd): pin the x86_64 row-walk step to cmp + adc (#173)

Misc

• chore: bump mise deps (#174)
• chore(release): v0.4.1 (#175)