Skip to content




  • Pro
Block or Report

Block or report chick

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories

  1. Provides dot visualizations of chisel/firrtl circuites

    Scala 10 4

  2. Forked from titusjan/astviewer

    Python Abstract Syntax Tree viewer in Qt

    Python 4 2

  3. Playground for ChiselDSP port to chisel3

    Scala 4 1

  4. A framework for efficiently composing hand-written OpenCL from Python

    C++ 2 1

  5. Forked from ucb-bar/dsptools

    A Library of Chisel3 Tools for Digital Signal Processing

    Scala 2 1

498 contributions in the last year

Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec Jan Mon Wed Fri
Activity overview
Contributed to chipsalliance/treadle, ucb-bar/chiseltest, ucb-bar/barstools and 5 other repositories

Contribution activity

January 2022

Created 7 commits in 1 repository
Opened 2 pull requests in 1 repository
freechipsproject/chisel-cheatsheet 2 merged
Reviewed 17 pull requests in 10 repositories
ucb-bar/chiseltest 4 pull requests
freechipsproject/chisel-cheatsheet 3 pull requests
chipsalliance/chisel3 2 pull requests
chipsalliance/treadle 2 pull requests
freechipsproject/chisel-template 1 pull request
freechipsproject/diagrammer 1 pull request
ucb-bar/dsptools 1 pull request
freechipsproject/chisel-testers 1 pull request
chipsalliance/firrtl 1 pull request
ucb-bar/chisel-repo-tools 1 pull request

Seeing something unexpected? Take a look at the GitHub profile guide.