Microarchitectural test for DEC TL #125
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Links to coverage and verification reports for this PR (#125) are available at https://chipsalliance.github.io/Cores-VeeR-EL2/ |
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Links to coverage and verification reports for this PR (#125) are available at https://chipsalliance.github.io/Cores-VeeR-EL2/ |
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LGTM |
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This PR adds tests for DEC Trigger Logic. The test is written using
pyuvmframework.