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RegEnable does not take named arguments #3768
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I agree that it would be nice to take named arguments, but it's a fundamental limitation of def macros in Scala 2. This fundamental limitation is fixed in Scala 3 so this is a "Wont Fix" in the Scala 2 version of Chisel, but this will be fixed by virtue of upgrading to Scala 3 when we finally do that (hopefully in the coming months). |
@jackkoenig is there any info on the Scala 3 upgrade? Is this the 7.0.0 release? Is there any migration plan? |
Probably not in 7.0.0, or at least I certainly won't hold up a 7.0 for it. No formal migration plan except that at least initially Chisel will cross-compile for 2.13 and 3 so that users can bump Chisel, and then migrate to Scala 3. There are some relatively minor but nevertheless backwards incompatible changes we need to make before upgrading to Scala 3.
Depending on maintenance burden I would like to support cross-compilation for a while. |
Type of issue: Bug Report
Please provide the steps to reproduce the problem:
Any Chisel design using
RegEnable(next=x_next, enable=x_en)
instead ofRegEnable(x_next, x_en)
What is the current behavior?
What is the expected behavior?
It should work and it was working in previous versions.
What is the use case for changing the behavior?
Adding named arguments makes the register declaration much more readable, especially for use cases where declaring separate enable and next wires does not make sense.
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