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Use c++14 to pass the verilator check #3876

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merged 1 commit into from
Feb 28, 2024

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Emin017
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@Emin017 Emin017 commented Feb 27, 2024

When I update to verilator v5.022, the svsim test will fail (someone has already raised an issue). I found out this was because verilator added a check for the c++14 standard.

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Change ChiselSim to requires a C++14 compiler.

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@seldridge seldridge added the No Release Notes Exclude from release notes, consider using Internal instead label Feb 28, 2024
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Generally seems fine to me. There shouldn't be an issue with requiring a compiler that supports C++14.

We haven't bumped the version of Tabby CAD OSS Suite in a while, so this likely hasn't cropped up. (We're using an older version of Verilator in CI.) We should probably do that, too, put that on latest, or add nightly/CD that tries to keep Tabby CAD up to date.

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We should merge this, but a longer term fix is we should probably make the arguments version-specific so that we can support some older Linux distros and Verilator versions out-of-the-box.

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jackkoenig commented Feb 28, 2024

I also wouldn't call this "No release notes", we do now require a compiler with C++14 support which should work for most, but lots of users in the hardware industry are on surprisingly old Linux distros.

@seldridge seldridge added Dependency Update Updates a dependency, will be included in release notes and removed No Release Notes Exclude from release notes, consider using Internal instead labels Feb 28, 2024
@seldridge seldridge merged commit 6229155 into chipsalliance:main Feb 28, 2024
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@jackkoenig: Can we backport this and/or get this onto a non-snapshot release? I think this may be necessary for newer Verilator. I'm thinking this (chipsalliance/chisel-template#127) is related.

@jackkoenig jackkoenig added this to the 5.x milestone Mar 7, 2024
@mergify mergify bot added the Backported This PR has been backported label Mar 7, 2024
mergify bot pushed a commit that referenced this pull request Mar 7, 2024
(cherry picked from commit 6229155)

# Conflicts:
#	svsim/src/main/scala/verilator/Backend.scala
mergify bot pushed a commit that referenced this pull request Mar 7, 2024
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@seldridge sure, no reason not to release 6.2.0 (or 6.1.1?) with this.

chiselbot pushed a commit that referenced this pull request Mar 7, 2024
(cherry picked from commit 6229155)

Co-authored-by: qimingchu <1346550347@qq.com>
chiselbot pushed a commit that referenced this pull request Mar 7, 2024
* Use c++14 to pass the verilator check (#3876)

(cherry picked from commit 6229155)

# Conflicts:
#	svsim/src/main/scala/verilator/Backend.scala

* Resolve backport conflicts

---------

Co-authored-by: qimingchu <1346550347@qq.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
@Emin017 Emin017 deleted the svsim-cpp14 branch March 11, 2024 01:55
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3 participants