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[SIG CLOUD 8] rebase custom changes to 4.18.0-553.50.1.el8_10 #229

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Merged
merged 5 commits into from
Apr 23, 2025
Merged

[SIG CLOUD 8] rebase custom changes to 4.18.0-553.50.1.el8_10 #229

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26d2203
x86/sev-es: Set x86_virt_bits to the correct value straight away, ins…
ciq-sahlberg Oct 11, 2023
6d1591a
x86/boot: Move x86_cache_alignment initialization to correct spot
ciq-sahlberg Oct 11, 2023
e1aadb6
x86/cpu: Allow reducing x86_phys_bits during early_identify_cpu()
PlaidCat Dec 26, 2024
70cb6ac
x86/cpu: Get rid of an unnecessary local variable in get_cpu_address_…
PlaidCat Dec 26, 2024
6fda250
x86/cpu: Provide default cache line size if not enumerated
PlaidCat Dec 26, 2024
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41 changes: 24 additions & 17 deletions arch/x86/kernel/cpu/common.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1021,17 +1021,34 @@ static void get_cpu_address_sizes(struct cpuinfo_x86 *c)
{
u32 eax, ebx, ecx, edx;

if (c->extended_cpuid_level >= 0x80000008) {
if (!cpu_has(c, X86_FEATURE_CPUID) ||
(c->extended_cpuid_level < 0x80000008)) {
if (IS_ENABLED(CONFIG_X86_64)) {
c->x86_clflush_size = 64;
c->x86_phys_bits = 36;
c->x86_virt_bits = 48;
} else {
c->x86_clflush_size = 32;
c->x86_virt_bits = 32;
c->x86_phys_bits = 32;

if (cpu_has(c, X86_FEATURE_PAE) ||
cpu_has(c, X86_FEATURE_PSE36))
c->x86_phys_bits = 36;
}
} else {
cpuid(0x80000008, &eax, &ebx, &ecx, &edx);

c->x86_virt_bits = (eax >> 8) & 0xff;
c->x86_phys_bits = eax & 0xff;

/* Provide a sane default if not enumerated: */
if (!c->x86_clflush_size)
c->x86_clflush_size = 32;
}
#ifdef CONFIG_X86_32
else if (cpu_has(c, X86_FEATURE_PAE) || cpu_has(c, X86_FEATURE_PSE36))
c->x86_phys_bits = 36;
#endif

c->x86_cache_bits = c->x86_phys_bits;
c->x86_cache_alignment = c->x86_clflush_size;
}

static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
Expand Down Expand Up @@ -1468,17 +1485,6 @@ static void __init cpu_parse_early_param(void)
*/
static void __init early_identify_cpu(struct cpuinfo_x86 *c)
{
#ifdef CONFIG_X86_64
c->x86_clflush_size = 64;
c->x86_phys_bits = 36;
c->x86_virt_bits = 48;
#else
c->x86_clflush_size = 32;
c->x86_phys_bits = 32;
c->x86_virt_bits = 32;
#endif
c->x86_cache_alignment = c->x86_clflush_size;

memset(&c->x86_capability, 0, sizeof(c->x86_capability));
c->extended_cpuid_level = 0;

Expand All @@ -1488,8 +1494,8 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
get_cpu_vendor(c);
get_cpu_cap(c);
get_model_name(c); /* RHEL8: get model name for unsupported check */
get_cpu_address_sizes(c);
setup_force_cpu_cap(X86_FEATURE_CPUID);
get_cpu_address_sizes(c);
cpu_parse_early_param();

if (this_cpu->c_early_init)
Expand All @@ -1503,6 +1509,7 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
} else {
identify_cpu_without_cpuid(c);
setup_clear_cpu_cap(X86_FEATURE_CPUID);
get_cpu_address_sizes(c);
}

setup_force_cpu_cap(X86_FEATURE_ALWAYS);
Expand Down