[8600G] Ryzen C States Are Zero > C1 #84
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Hello, C3/C6/C7 are implemented for Intel Processors only. It might be feasible to read above C3 but I don't read those counters specifications in AMD Zen doc. CC6 & PC6 are undocumented bits. See project ZenState C2 is something I have to look at... |
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Based on By the way, you should read the same in the 'Kernel Data' window |
I think RyZen micro-code does not export all C states to Linux Kernel. |
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Is this the same with Windows software ? |
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Oopps. CPU is not supported by ThrottleStop |
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Perhaps in the EFI/BIOS or the AMD software, but googling for Zen C-States doesn't show any monitoring of deep idle states. |
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I'm closing this issue but feel to try the experimental Zen overclocking @ issue #87 |
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Hello, |
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Hello. Don't know why but I missed this notifications. My older board is broken. Will try solder new mosfets next week... Now I have 8600G CPU. I compiled from git-trunk and saw that;
Don't know if "I/O ASM access to the FCH" improvements are enabled supported on my board/cpu. Might be, they work on old architectures. If any data required to you for implement your program, I can send any kind of dump. When I able to repair my AM4 board, try to run cpufreqd on it to see if there are any improvement on C states with x1700 and 5700G CPUs. |
Here With Intel processors, those values are easily read from MSR registers. Meanwhile I had implemented software kernel counters down to C6 Just start driver with these parameters: You can then alternate as will the idle limit from the UI window named You will have to unload or prevent any other driver to act as CPU-Idle, CPU-Freq and ClockSource. See Wiki/ When done, please provide me, using Mardown format, the output of the following CLI |
cyring
changed the title
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Hello there. At settings, CPU-IDLE driver and CPU-FREQ driver shows OFF while "CPU-IDLE route" shown as I/O
It's sad thing that learning AMD (still) do not exposes it's C states via MSRs, which is super easy to work with it. Anyway, Here is the output of my CPU/System;
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Thank you for the output.
Temperature is not showing. That's an issue. I'm searching for thermal registers and will come back with code for testings. |
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With custom kernel boot parameters and again custom corefreqk kernel module parameters, there is an improvement. Now CoreFreq reports something on C2-C3 column. But I believe, it should be need CC6 state indeed. |
Using short key Edit: prerequisites are CoreFreq well registered as CPU-Idle Edit: I forgot to add a parameter to make limit permanent. I will add it soon. Meanwhile you can still use the UI to switch C-State limit as will. |
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Btw can you disable any SPREAD SPECTRUM in your BIOS ? You should get an estimation of DRAM to |
I forgot I already made it available through the parameter For example, looking at your |- MONITOR/MWAIT
|- State index: #0 #1 #2 #3 #4 #5 #6 #7
|- Sub C-State: 1 1 0 0 0 0 0 0 If your want to make CC6 as a startup limit, you will set a insmod build/corefreqk.ko Register_ClockSource=1 Register_Governor=1 \
Register_CPU_Idle=1 Register_CPU_Freq=1 \
Override_SubCstate="1,1,1,1,1,1,0,0"As a result, you will get such override |- MONITOR/MWAIT
|- State index: #0 #1 #2 #3 #4 #5 #6 #7
|- Sub C-State: 1 1 1 1 1 1 0 0 And the kernel Idle Limit as the following Clock Source < corefreq_tsc>
CPU-Freq driver [ corefreqk-perf]
Governor [ corefreq-policy]
CPU-Idle driver [ corefreqk-idle]
|- Idle Limit < C6>
|- State POLL C1 C2 C3 C4 C5 C6
|- CPUIDLE ZEN-C1 ZEN-C2 ZEN-C3 ZEN-C4 ZEN-C5 ZEN-C6
|- Power -1 0 0 0 0 0 0
|- Latency 0 1 20 40 60 80 100
|- Residency 0 2 40 80 120 160 200 Consequently Monitoring will start using CC6:
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Yup. Now it's looks better. Thanks.
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Here is the registers you asking for: |
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Output from develop branch ; |
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As dump with Do you confirm building/running latest commits ? |
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I did; Only kernel module rebuilt. I am not git guru but, I think this is what should I need to do... Don't know how to verify it. Than I have 2 Ram slot on my MB and both of them used with 24GB Sticks. |
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I think I have a digit mistake in register address. Line 208 in 87344fa and replace code with this one: #define SMU_AMD_THM_TCTL_CCD_REGISTER_F19H_61H \
(SMU_AMD_THM_TCTL_REGISTER_F17H + 0x300)Edit this other header file: Line 11869 in 87344fa and replace function pointer as bellow: .Query = Query_AMD_F19h_61h_PerClusterNext please rebuild all And reload all for temperature testing Thank you EDIT: For DIMM geometry, can you also peek those addresses ## Prior Zen4
./zencli smu 0x50030
./zencli smu 0x50034
./zencli smu 0x50038
./zencli smu 0x5003C
## Since Zen4
./zencli smu 0x50040
./zencli smu 0x50044
./zencli smu 0x50048
./zencli smu 0x5004C |
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Replaced the lines as you indicated. Still no core temps appears on main screen. I don't know what this SMU outputs means but... I definitely sure about that, at least, one of my sticks is placed at other slot and my Rams are 24GB. Looks like some electronic info at chips do not comply with reality. 😄 |
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Can you load the |
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Of-course I am. Unfortunately, zenpower does not work anymore. |
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That's the odd thing:
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If |
can output data in JSON, including voltage, power, temp |
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And k10temp is actually reading from the die temp. So it's reading perfectly correct while I am mining crypto with my CPU right now :) nct6799-isa-0290 is also reporting it as : Unfortunately, 8000G series has ultra thick IHS, glued with low grade thermal glue. (really a big shame for AMD!) Just altering thermal paste with PTM7950 or a liquid metal reduces temps up to 25C degree (of-course with AIO setup). I am planning to delid it soon, when my PTM7950 thermal pad comes from AliExpress. So might be my fan could gonna holiday even if I am torturing the CPU with cryptos...
While corefreq-cli -j can return those data, but AFAIK all linux users will definitely prefer to see it on lm-sensors directly. Not from another program. So we could move that value into Gnome shell, with freon extension. Think about it. I don't think if it's hard to do while you have already the working code... Probably req. just adding some numbers into header file and viola... |
Brillant suggestion you have. Looking closer into function So can you please read this range of the |
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@EUA Hello. Not sure if you were notified about above |
Yup. Have some natural gift on beta testing. :) I have busy with soldering mosfets to my old motherboard last night. And about for those registers; all the range cleared with zero. |
If all cleared then no CCD.
EDIT : I will program another method and come back with a commit for testing. |
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Using your previous read of: ./zencli smu 0x00059800Now extracting bits and computing temperature: echo $(( 0x822b0000 >> 21 ))echo $(( ((1041*5)/40)-49 ))So the SMU thermal register address is definitely I just merged all development commits into |
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So what could be a problem? Some kernel options are not allowing to read them? |
Cam you show me screenshots ? In contrary to |
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I got it. This from TCL, not CCD. At HWINFO (windows), we got detailed voltage and temperature info belongs to each core. Not one temp applied to each core. So, this is misleading. For now, unfil figure to read CCD from chip,it's better to not show SMT or Core but "Package" automatically at settings for 8000 Series APUs,...
Noticed that, core 010 minimum reported as 64... It's just a sw glitch I think. otherwise if you torture CPU 1, also CPU10 reports same value. |
If true then
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Indeed, at APU series, there are no discrete CCD as other Ryzen 7000 CPUs. Also different minimum report is not really important since it will be fade away with proper CCD thermal implementation... Here is the info: Also my HWINFO
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Hello Actions are transferred into #424 and a Wiki page is added for Ryzen 5 8600G |
Since APU has GPU in it, CoreFreq might show the GPU clock also. Because soon gcc start to move some threads into GPU section at APU... So it counts as core too. Just brainstorming. |
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The main issue is solved and the remaining actions are in list to do after this release candidate. |
Hi,
Thanks for great program.
I got Ryzen 1700 with B350 MB. I enabled deep sleep at bios etc...
I tried to do everything but don't have any success.
corefreq only shows Turbo, C0 and C1 states.
It shown at program that (CC6 & PC6 green) but C3/C6/C7 counters are always zero at frequency and Idle C-states view.
Why does C3/C6/C7 states not supported by CoreFreq?
PS: using cpupower monitor give this result.
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