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KNOWNBUG test for nettype #1107

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Merged
merged 1 commit into from
May 11, 2025
Merged

KNOWNBUG test for nettype #1107

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9 changes: 9 additions & 0 deletions regression/verilog/nettype/nettype1.desc
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KNOWNBUG
nettype1.sv

^EXIT=0$
^SIGNAL=0$
--
^warning: ignoring
--
nettype is not implemented.
11 changes: 11 additions & 0 deletions regression/verilog/nettype/nettype1.sv
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module main;

nettype logic [31:0] some_word_type;
nettype logic signed [31:0] some_signed_type;

some_word_type some_word;
some_signed_type some_signed;

p0: assert final ($bits(some_word) == 32);

endmodule
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