Skip to content

Conversation

kroening
Copy link
Collaborator

Verilog's bit-select expression may map onto an extractbit or an array index expression, depending on the type of the first operand. This introduces ID_verilog_bit_select as ID for bit-select expressions, until the type of the first operand is known.

Verilog's bit-select expression may map onto an extractbit or an array index
expression, depending on the type of the first operand.  This introduces
ID_verilog_bit_select as ID for bit-select expressions, until the type of
the first operand is known.
@kroening kroening marked this pull request as ready for review April 13, 2024 20:08
@tautschnig tautschnig merged commit 9e68c85 into main Apr 15, 2024
@tautschnig tautschnig deleted the verilog_bit_select branch April 15, 2024 08:31
Romy15200 pushed a commit to Romy15200/nws that referenced this pull request Aug 19, 2025
Verilog: use `ID_verilog_bit_select` for bit-select expressions
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants