SVA sequence and/or
#943
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SVA sequence and/or
#943
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The 1800-2017 SystemVerilog grammar allows "a and b" and "a or b" to be either a sequence, or a property. If both "a" and "b" are sequences, then "a and b" and "a or b" is a sequence as well. This changes the grammar to allow the sequence case.
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tautschnig
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Romy15200
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SVA sequence `and`/`or`
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The 1800-2017 SystemVerilog grammar allows
a and banda or bto be either a sequence, or a property. If bothaandbare sequences, thena and banda or bis a sequence as well.This changes the grammar to allow the sequence case.