[ARM64] Fix UnspillReg instruction generation #17246
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Fixes the runtime issues (#16359,#15389) seen with COMPlus_JitStressRegs=0x2* on ARM64.
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The tizen jobs were disabled. The failures can be ignored. @CarolEidt @dotnet/arm64-contrib @dotnet/jit-contrib PTAL |
| emitAttr attr = emitTypeSize(targetType); | ||
| emitter* emit = getEmitter(); | ||
| var_types targetType = unspillTree->gtType; | ||
| if (targetType != genActualType(varDsc->lvType) && !varTypeIsGC(targetType) && !varDsc->lvNormalizeOnLoad()) |
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Could you add a comment to describe the case where the type of the tree and genActualType(varDsc->lvType) don't match?
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@CarolEidt The comment would be a duplicate of the XARCH comment above. Do you just want the XARCH comment moved out of the ifdef? Or do you want it duplicated here?
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Ah, I missed that. Actually, looking at the code above, I see the // TODO-Cleanup: The following code could probably be further merged and cleaned up. which, along with the xarch comment, probably covers it adequately. Thanks
| emitAttr attr = emitTypeSize(targetType); | ||
| emitter* emit = getEmitter(); | ||
| var_types targetType = unspillTree->gtType; | ||
| if (targetType != genActualType(varDsc->lvType) && !varTypeIsGC(targetType) && !varDsc->lvNormalizeOnLoad()) |
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Ah, I missed that. Actually, looking at the code above, I see the // TODO-Cleanup: The following code could probably be further merged and cleaned up. which, along with the xarch comment, probably covers it adequately. Thanks
Use the actual type of the lclVar to for load generated in CodeGen::genUnspillRegIfNeeded() .
This fixes the test failures seen on ARM64 platforms with JitStressRegs=0x2 / 0x200
Ref: https://github.com/dotnet/coreclr/issues/15389, https://github.com/dotnet/coreclr/issues/16359