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Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
using System.Linq;
using System.Text.RegularExpressions;

namespace Amd64InstructioTableGenerator
namespace Amd64InstructionTableGenerator
{
[Flags]
public enum EncodingFlags : int
Expand Down Expand Up @@ -152,7 +152,7 @@ static Amd64InstructionSample()
{"lidt", (e) => { return SuffixFlags.M10B;}},
{"sgdt", (e) => { return SuffixFlags.M10B;}},
{"sidt", (e) => { return SuffixFlags.M10B;}},
{"vlddqu", (e) => { return Amd64InstructioTableGenerator.Amd64L(SuffixFlags.M32B, SuffixFlags.M16B, e);}},
{"vlddqu", (e) => { return Amd64InstructionTableGenerator.Amd64L(SuffixFlags.M32B, SuffixFlags.M16B, e);}},
{"vprotb", (e) => { return SuffixFlags.M16B;}},
{"vprotd", (e) => { return SuffixFlags.M16B;}},
{"vprotq", (e) => { return SuffixFlags.M16B;}},
Expand Down Expand Up @@ -499,7 +499,7 @@ public SuffixFlags parseSuffix()
}


class Amd64InstructioTableGenerator
class Amd64InstructionTableGenerator
{
List<Amd64InstructionSample> samples = new List<Amd64InstructionSample>();

Expand All @@ -514,7 +514,7 @@ class Amd64InstructioTableGenerator
Dictionary<Map, Dictionary<int, string>> opcodes;
int currentExtension = -8;

Amd64InstructioTableGenerator()
Amd64InstructionTableGenerator()
{
regExpandOpcodes = new List<(Map, int)>()
{
Expand Down Expand Up @@ -926,7 +926,7 @@ void WriteCode()

static void Main(string[] args)
{
new Amd64InstructioTableGenerator();
new Amd64InstructionTableGenerator();
}
}
}
14 changes: 7 additions & 7 deletions src/debug/ee/amd64/gen_amd64InstrDecode/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -54,7 +54,7 @@ sample instruction disassembly.
The process entails
- Generating a necessary set of instructions
- Generating parsable disassembly for the instructions
- Parsing the disassambly
- Parsing the disassembly

### Generating a necessary set of instructions

Expand All @@ -80,14 +80,14 @@ We will iterate through all the necessary set. Many of these combinations
will lead to invalid/undefined encodings. This will cause the disassembler
to give up and mark the disassemble as bad.

The disassemble will then resume trying to diassemble at teh next boundary.
The disassemble will then resume trying to diassemble at the next boundary.

To make sure the disassembler attempts to disassemble every instruction,
we need to make sure the preceding instruction is always valid and terminates
at our desired instruction boundary.

Through examination of the `Primary` opcode map, it is obsereved that
0x50-0x5f are all 1 byte instructions. These become conveninet padding.
Through examination of the `Primary` opcode map, it is observed that
0x50-0x5f are all 1 byte instructions. These become convenient padding.

After each necessary instruction we insert enough padding bytes to fill
the maximum instruction length and leave at least one additional one byte
Expand Down Expand Up @@ -193,7 +193,7 @@ Windows disassembler may also work. Not attempted.
# Parse disassembly and generate code
cat opcodes.intel | dotnet run > ../amd64InstrDecode.h
```
#### Finding releavant dissassembly lines
#### Finding relevant disassembly lines

We are not interested in all lines in the disassembly. The disassembler
stray comments, recovery and our padding introduce lines we need to ignore.
Expand Down Expand Up @@ -275,7 +275,7 @@ For a few other instructions the `L`, `W`, `vvvv` value may the instruction
change behavior. Usually these do not change mnemonic.

The set of instructions is therefore usually grouped by the opcode map and
`opCodeExt` generated above. For thes a change in `opCodeExt` or `map`
`opCodeExt` generated above. For these a change in `opCodeExt` or `map`
will start a new group.

For select problematic groups of `modrm.reg` sensitive instructions, a
Expand Down Expand Up @@ -323,7 +323,7 @@ respective descriptions.

## Limitations

The approach of using a single object file as the source of disassebly
The approach of using a single object file as the source of disassembly
samples, is restricted to a max compilation/link unit size. Early drafts
were generating more instructions, and couldn't be compiled.

Expand Down