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[RISC-V] Floating NaN overflow test fix #94168
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We're working on moving towards deterministic behavior across platforms: #61885
This is going to necessitate, longer term, that saturation occurs as it is what most newer platforms do and what many specs (like WASM) require. This is also going to necessitate standardizing the behavior for
NaN
.For x64, it currently returns a sentinel value
0x8000_0000
(int) or0x8000_0000_0000_0000
(long) when the output type would overflow or when NaN is given.byte
andshort
therefore currently expect0
because its truncating the 32 or 64-bit result to 8 or 16-bits.For Arm64, it saturates and converts
NaN
to zero. For WASM, it requires saturation and leavesNaN
conversion undefined.We plan on matching Arm64 for the cross platform deterministic behavior here as it is simple and straightforward. It matches the general IEEE 754 guidance that you compute the result as if to infinite precision and unbounded range, and then round to the nearest representable.
NaN
then logically has no equivalent, so it becoming zero "makes sense" and avoids confusion in other regards.There was a problem hiding this comment.
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As such, it would be better if we could ensure the RISC-V implementation adjusts and matches this behavior. The underlying platform specific behavior would then be available in the future for the APIs proposed in the linked issue.
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Thank you for your comment, I will try to find the proper solution.