I2S bidirectional mode shifts DOUT on wrong clock edge

[earlephilhower]

Discussed in #3114

^{Originally posted by Locutus74 September 5, 2025}
Version: 5.0.0
Board: genuine Pi Pico2 (without WiFi)
ADC/DAC-Board: Digilent Pmod I2S2 I²S Soundcard (Cirrus Logic chips)

I'm struggling with using a Digilent Pmod I²C module (for full duplex I/O) with a Pi Pico2. It seems like my SCLK is inverted?

I have no idea how this even can happen? Setup is like this:

void setup()
{
  // choose a very high clock rate were all required clk-sigs are obtainable by integer-division
  // we use 31.25 kHz which suits 256 MHz 
  set_sys_clock_khz( 256000000 / 1000 , true); // 256 MHz

  // setup pins: must be run before setFrequency() and i2s.begin()
  i2s.setDOUT(2);
  i2s.setDIN(3);
  i2s.setBCLK(0); // LRCLK = BCLK + 1
  i2s.setMCLK(15);
  i2s.setMCLKmult(256); 
  //i2s.setMCLKmult(384); // must use 240 MHz sysclk for 24 bit samples...

  //i2s.setLSBJFormat();
  
  i2s.setBitsPerSample(16);
  i2s.setFrequency( 31250 );
    
  i2s.setBuffers(4, bufferSizeSamples, 0); // 4 DMA buffers with 256 samples each

  i2s.onTransmit( onTransmitCallback );
  i2s.onReceive( onReceiveCallback );

  // prefill Buffer (maybe important?!?)
  while( i2s.availableForWrite() )
  {
    i2s.write( (uint32_t)0, false );
  }
  
  i2s.begin();
  ...
  ...

An audio recording looks like this:

Am I doing something obviously wrong here?

All the best and many thanks,
Stefan