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litedram_gen: Don't block user port with no CPU #292

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litedram_gen: Don't block user port with no CPU #292

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8 changes: 7 additions & 1 deletion litedram/gen.py
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Original file line number Diff line number Diff line change
Expand Up @@ -655,7 +655,13 @@ def __init__(self, platform, core_config, **kwargs):

# User ports -------------------------------------------------------------------------------
user_enable = Signal()
self.sync += user_enable.eq(self.ddrctrl.init_done.storage & ~self.ddrctrl.init_error.storage)
if cpu_type is not None:
# block user port access until ready
self.sync += user_enable.eq(self.ddrctrl.init_done.storage & ~self.ddrctrl.init_error.storage)
else:
# memtest without CPU uses the user port, so don't block
self.comb += user_enable.eq(1)

self.comb += [
platform.request("user_clk").eq(ClockSignal()),
platform.request("user_rst").eq(ResetSignal()),
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