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Add an exception for TSA for host kernels before 6.1.153

Reason

Vulnerability checks are failing.

TSA is marked as vulnerable as 6.1 kernels before 6.1.153 don't correctly pass through the CPUID bit to let the guest know that the microcode is applied (CLEAR_VERW).
We noticed only now as we just updated the guest kernels and they now contain the TSA mitigation.

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codecov bot commented Sep 30, 2025

Codecov Report

✅ All modified and coverable lines are covered by tests.
✅ Project coverage is 82.76%. Comparing base (f481687) to head (2fbb814).
⚠️ Report is 1 commits behind head on main.

Additional details and impacted files
@@           Coverage Diff           @@
##             main    #5458   +/-   ##
=======================================
  Coverage   82.76%   82.76%           
=======================================
  Files         263      263           
  Lines       27300    27300           
=======================================
  Hits        22594    22594           
  Misses       4706     4706           
Flag Coverage Δ
5.10-m5n.metal 82.94% <ø> (-0.01%) ⬇️
5.10-m6a.metal 82.19% <ø> (ø)
5.10-m6g.metal 79.53% <ø> (-0.01%) ⬇️
5.10-m6i.metal 82.94% <ø> (ø)
5.10-m7a.metal-48xl 82.18% <ø> (ø)
5.10-m7g.metal 79.53% <ø> (-0.01%) ⬇️
5.10-m7i.metal-24xl 82.90% <ø> (-0.01%) ⬇️
5.10-m7i.metal-48xl 82.91% <ø> (-0.01%) ⬇️
5.10-m8g.metal-24xl 79.53% <ø> (ø)
5.10-m8g.metal-48xl 79.53% <ø> (ø)
6.1-m5n.metal 82.98% <ø> (ø)
6.1-m6a.metal 82.23% <ø> (-0.01%) ⬇️
6.1-m6g.metal 79.53% <ø> (-0.01%) ⬇️
6.1-m6i.metal 82.97% <ø> (ø)
6.1-m7a.metal-48xl 82.22% <ø> (ø)
6.1-m7g.metal 79.53% <ø> (-0.01%) ⬇️
6.1-m7i.metal-24xl 82.98% <ø> (ø)
6.1-m7i.metal-48xl 82.98% <ø> (-0.01%) ⬇️
6.1-m8g.metal-24xl 79.53% <ø> (-0.01%) ⬇️
6.1-m8g.metal-48xl 79.53% <ø> (ø)

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@Manciukic Manciukic force-pushed the fix-tsa-vuln-check branch 4 times, most recently from 0c61122 to 95dd5c9 Compare September 30, 2025 13:08
TSA is marked as vulnerable as 6.1 kernels before 6.1.153 don't
correctly pass through the CPUID bit to let the guest know that the
microcode is applied (CLEAR_VERW).
We noticed only now as we just updated the guest kernels and they now
contain the TSA mitigation.

Signed-off-by: Riccardo Mancini <mancio@amazon.com>
@Manciukic Manciukic marked this pull request as ready for review September 30, 2025 15:12
@Manciukic Manciukic added the Status: Awaiting review Indicates that a pull request is ready to be reviewed label Sep 30, 2025
@roypat
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roypat commented Sep 30, 2025

cant we just update the host kernel?

@Manciukic
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cant we just update the host kernel?

The AMI wasn't yet available when I checked. This is to unblock the CI.

@Manciukic Manciukic enabled auto-merge (rebase) October 1, 2025 09:26
@Manciukic Manciukic merged commit feffd18 into firecracker-microvm:main Oct 1, 2025
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4 participants