I2S driver for allwinner H3/H5.

Documentation/devicetree/bindings/sound/sun4i-i2s.txt

@@ -1,4 +1,4 @@
-* Allwinner A10 I2S controller
+* Allwinner A10/A38T/H3/H5 I2S controller
 
 The I2S bus (Inter-IC sound bus) is a serial link for digital
 audio data transfer between devices in the system.
@@ -8,23 +8,36 @@ Required properties:
 - compatible: should be one of the following:
    - "allwinner,sun4i-a10-i2s"
    - "allwinner,sun6i-a31-i2s"
+   - "allwinner,sun8i-a83t-i2s"
+   - "allwinner,sun8i-h3-i2s"
+   - "allwinner,sun8i-h5-i2s"
 - reg: physical base address of the controller and length of memory mapped
   region.
 - interrupts: should contain the I2S interrupt.
 - dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
 	Documentation/devicetree/bindings/dma/dma.txt
-- dma-names: should include "tx" and "rx".
+- dma-names: should include "tx" and/or "rx".
 - clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
 - clock-names: should contain the following:
    - "apb" : clock for the I2S bus interface
    - "mod" : module clock for the I2S controller
 - #sound-dai-cells : Must be equal to 0
+- sound-dai: phandle to the codec dai
 
 Required properties for the following compatibles:
 	- "allwinner,sun6i-a31-i2s"
 - resets: phandle to the reset line for this codec
 
-Example:
+Optional properties:
+
+- interrupts: I2S interrupt
+- resets: phandle to the reset of the device
+
+Required nodes:
+
+ - port: link to the associated CODEC (DAC, HDMI...)
+
+Example 1:
 
 i2s0: i2s@01c22400 {
 	#sound-dai-cells = <0>;
@@ -37,3 +50,21 @@ i2s0: i2s@01c22400 {
 	       <&dma SUN4I_DMA_NORMAL 3>;
 	dma-names = "rx", "tx";
 };
+
+Example 2:
+
+i2s2: i2s at 1c22800 {
+	compatible = "allwinner,sun8i-a83t-i2s";
+	reg = <0x01c22800 0x60>;
+	clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>;
+	clock-names = "apb", "mod";
+	resets = <&ccu RST_I2S2>;
+	dmas = <&dma 27>;
+	dma-names = "tx";
+	status = "disabled";
+	port {
+		i2s2_hdmi: endpoint {
+			remote-endpoint = <&hdmi_i2s2>;
+		};
+	};
+};

arch/arm/boot/dts/sunxi-h3-h5.dtsi

@@ -383,6 +383,11 @@
 				drive-strength = <40>;
 			};
 
+			i2s0_pins: i2s0 {
+				pins = "PA18", "PA19", "PA20", "PA21";
+				function = "i2s0";
+			};
+
 			i2c0_pins: i2c0 {
 				pins = "PA11", "PA12";
 				function = "i2c0";
@@ -579,6 +584,23 @@
 			status = "disabled";
 		};
 
+		i2s0: i2s@01c22000 {
+			#sound-dai-cells = <0>;
+			compatible = "allwinner,sun8i-h3-i2s";
+			reg = <0x01c22000 0x400>;
+			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; /* 45-32=13, P207 */
+			clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
+			clock-names = "apb", "mod";
+			resets = <&ccu RST_BUS_I2S0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2s0_pins>;
+			dmas = <&dma 3>, <&dma 3>;
+			dma-names = "rx", "tx";
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
 		uart0: serial@01c28000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0x01c28000 0x400>;

arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-cir-led-overlay.dts

@@ -0,0 +1,27 @@
+// Definitions for sunxi-cir-led
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "allwinner,sun50i-h5";
+
+	fragment@0 {
+		target = <&pio>;
+		__overlay__ {
+			cir_led_pin: ir@0 {
+				pins = "PA6";
+				function = "gpio_out";
+			};
+		};
+	};
+
+	fragment@1 {
+		target-path = <&ir>;
+		__overlay__ {
+			pinctrl-names = "default", "cir-led";
+			pinctrl-0 = <&ir_pins_a>;
+			pinctrl-1 = <&cir_led_pin>;
+			cir-led-gpio = <&pio 0 6 GPIO_ACTIVE_LOW>; /* PA6 */
+		};
+	};
+};