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This signal emanates from the damaged zone on the die.
Proceeding by elimination, it must be the output of the NAND gate A57 (page 13).
The only possible inputs to that gate are pins RDI, WRI, and PCS.
I'll have to check if A57 isn't a NOR instead of a NAND...
Gates A104 and A57 updated with the only solution that makes sense.
Pins P (Z80 data) are outputs when /PCS and /PRD are low.
Pins AD (MCU data) are outputs when /GACS and /RDI are low.
The MCU can write to registers when /GACS and /WRI are low (also irreversably puts the chip in MCU_MODE).
PINS_AD_DIR on page 9 seems undriven.
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