v0.27.0

Round 39, Cascade Lake (Intel AVX-512): every 2-D parity row now faster than FFTW.

• Wider column strips (cl3StripWidth): an N-D axis spanning ≥ 2^18 elements with lines ≥ 256 apart takes 128 lines (n ≤ 256) or 64: the strip step 1.93–2.36× faster at 512², 1.26× at 1024², up to 2.97× on 3-D axes.
• 2-D rows on the stack-frame kernels on Intel too (cl3FrameRows): 32² 1.29×, 64² 1.14×, 128² 1.06×.
• Round 35's "2-D 512² is allocation placement" did not hold: placement moved it < 10% in one process; the column passes wait on lines the prefetchers do not fetch.
  End to end vs v0.26.1 (9 rounds, 4 placements): 2-D 512² 1.219×, 1024² 1.183×, 32² 1.308×, 64² 1.129×; untouched rows 0.99–1.02. FFTW parity: 2-D 64²/128²/256²/512²/1024² 0.937/0.946/0.949/0.883/0.834 (were 1.061/0.981/0.998/1.003/1.025); rows faster than FFTW 10 → 14 of 24. Bit-identical outputs (wide vs narrow strips); keeps v0.26.3's N-D guard. Details: BENCHMARKS.md, Round 39.