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Added capm MIM DRC rules from sky130.tech in open_pdks. #263

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130 changes: 93 additions & 37 deletions docs/rules/periphery-rules.rst
Original file line number Diff line number Diff line change
Expand Up @@ -121,7 +121,7 @@
- Value
- Unit
* - :drc_rule:`(x.1a)`
- p1m.md (OPC), DECA and AMKOR layers (pi1.dg, pmm.dg, rdl.dg, pi2.dg, ubm.dg, bump.dg) and mask data for p1m, met1, via, met2 must be on a grid of mm
- p1m.md (OPC), DECA and AMKOR layers (pi1.dg, pmm.dg, rdl.dg, pi2.dg, ubm.dg, bump.dg) and mask data for p1m, met1, via, met2, capm and cap2m must be on a grid of mm
-
- 0.001
- mm
Expand Down Expand Up @@ -1825,63 +1825,53 @@
* - :drc_rule:`(capm.1)`
- Min width of capm
-
- N/A
- N/A
- 1
- µm
* - :drc_rule:`(capm.2a)`
- Min spacing of capm to capm
-
- N/A
- N/A
- 0.84
- µm
* - :drc_rule:`(capm.2b)`
- Minimum spacing of capacitor bottom_plate to bottom plate
-
- N/A
- N/A
- 1.2
- µm
* - :drc_rule:`(capm.3)`
- Minimum enclosure of capm (top_plate) by met2
- Minimum enclosure of capm (top_plate) by met3
-
- N/A
- N/A
- 0.14
- µm
* - :drc_rule:`(capm.4)`
- Min enclosure of via2 by capm
- Min enclosure of via3 by capm
-
- N/A
- N/A
- 0.14
- µm
* - :drc_rule:`(capm.5)`
- Min spacing between capm and via2
- Min spacing between capm and via3
-
- N/A
- N/A
- 0.14
- µm
* - :drc_rule:`(capm.6)`
- Maximum Aspect Ratio (Length/Width)
-
- N/A
- N/A
- 20
-
* - :drc_rule:`(capm.7)`
- Only rectangular capacitors are allowed
- Only rectangular or L-shaped capacitors allowed
-
-
-
- N/A
- N/A
* - :drc_rule:`(capm.8)`
- Min space, no overlap, between via and capm
- Min space, no overlap, between via2 and capm
-
- N/A
- N/A
* - :drc_rule:`(capm.10)`
- capm must not straddle nwell, diff, tap, poly, li1 and met1 (Rule exempted for capm overlapping capm_2t.dg)
- :drc_flag:`TC`
- N/A
- N/A
- 0.14
- µm
* - :drc_rule:`(capm.11)`
- Min spacing between capm to (met2 not overlapping capm)
- Min spacing between capm to (met3 not overlapping capm)
-
- N/A
- N/A
* - :drc_rule:`(capm.12)`
- Max area of capm (um^2)
-
- N/A
- N/A
- 0.5
- µm


.. figure:: periphery/p036-capm_dotdash.svg
Expand All @@ -1890,6 +1880,72 @@



:drc_rule:`(cap2m.-)`
---------------------

.. list-table:: Function: Defines MIM capacitor
:header-rows: 1
:stub-columns: 1
:widths: 9 73 6 6 6

* - :drc_rule:`Name`
- Description
- :drc_flag:`Flags`
- Value
- Unit
* - :drc_rule:`(cap2m.1)`
- Min width of cap2m
-
- 1
- µm
* - :drc_rule:`(cap2m.2a)`
- Min spacing of cap2m to cap2m
-
- 0.84
- µm
* - :drc_rule:`(cap2m.2b)`
- Minimum spacing of capacitor bottom_plate to bottom plate
-
- 1.2
- µm
* - :drc_rule:`(cap2m.3)`
- Minimum enclosure of cap2m (top_plate) by met4
-
- 0.14
- µm
* - :drc_rule:`(cap2m.4)`
- Min enclosure of via4 by cap2m
-
- 0.2
- µm
* - :drc_rule:`(cap2m.5)`
- Min spacing between cap2m and via3
-
- 0.2
- µm
* - :drc_rule:`(cap2m.6)`
- Maximum Aspect Ratio (Length/Width)
-
- 20
-
* - :drc_rule:`(cap2m.7)`
- Only rectangular or L-shaped capacitors allowed
-
-
-
* - :drc_rule:`(cap2m.8)`
- Min space, no overlap, between via3 and cap2m
-
- 0.14
- µm
* - :drc_rule:`(cap2m.11)`
- Min spacing between cap2m to (met3 not overlapping cap2m)
-
- 0.5
- µm



:drc_rule:`(vpp.-)`
-------------------

Expand Down
2 changes: 1 addition & 1 deletion docs/rules/periphery/p018-x_dotdash.csv
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
Name,Description,Flags,Value,Unit
(x.1a),"p1m.md (OPC), DECA and AMKOR layers (pi1.dg, pmm.dg, rdl.dg, pi2.dg, ubm.dg, bump.dg) and mask data for p1m, met1, via, met2 must be on a grid of mm",,0.001,mm
(x.1a),"p1m.md (OPC), DECA and AMKOR layers (pi1.dg, pmm.dg, rdl.dg, pi2.dg, ubm.dg, bump.dg) and mask data for p1m, met1, via, met2, capm and cap2m must be on a grid of mm",,0.001,mm
(x.1b),Data for SKY130 layout and mask on all layers except those mentioned in 1a must be on a grid of mm (except inside Seal ring),,0.005,mm
(x.2),Angles permitted on: diff,,N/A,N/A
(x.2),"Angles permitted on: diff except for:
Expand Down
11 changes: 11 additions & 0 deletions docs/rules/periphery/p036-cap2m_dotdash.csv
Original file line number Diff line number Diff line change
@@ -0,0 +1,11 @@
Name,Description,Flags,Value,Unit
(cap2m.1),Min width of cap2m,,1,µm
(cap2m.2a),Min spacing of cap2m to cap2m,,0.84,µm
(cap2m.2b),Minimum spacing of capacitor bottom_plate to bottom plate,,1.2,µm
(cap2m.3),Minimum enclosure of cap2m (top_plate) by met4,,0.14,µm
(cap2m.4),Min enclosure of via4 by cap2m,,0.2,µm
(cap2m.5),Min spacing between cap2m and via3,,0.2,µm
(cap2m.6),Maximum Aspect Ratio (Length/Width),,20,
(cap2m.7),Only rectangular or L-shaped capacitors allowed,,,
(cap2m.8),"Min space, no overlap, between via3 and cap2m",,0.14,µm
(cap2m.11),Min spacing between cap2m to (met3 not overlapping cap2m),,0.5,µm
22 changes: 10 additions & 12 deletions docs/rules/periphery/p036-capm_dotdash.csv
Original file line number Diff line number Diff line change
@@ -1,13 +1,11 @@
Name,Description,Flags,Value,Unit
(capm.1),Min width of capm,,N/A,N/A
(capm.2a),Min spacing of capm to capm,,N/A,N/A
(capm.2b),Minimum spacing of capacitor bottom_plate to bottom plate,,N/A,N/A
(capm.3),Minimum enclosure of capm (top_plate) by met2,,N/A,N/A
(capm.4),Min enclosure of via2 by capm,,N/A,N/A
(capm.5),Min spacing between capm and via2,,N/A,N/A
(capm.6),Maximum Aspect Ratio (Length/Width),,N/A,N/A
(capm.7),Only rectangular capacitors are allowed,,N/A,N/A
(capm.8),"Min space, no overlap, between via and capm",,N/A,N/A
(capm.10),"capm must not straddle nwell, diff, tap, poly, li1 and met1 (Rule exempted for capm overlapping capm_2t.dg)",TC,N/A,N/A
(capm.11),Min spacing between capm to (met2 not overlapping capm),,N/A,N/A
(capm.12),Max area of capm (um^2),,N/A,N/A
(capm.1),Min width of capm,,1,µm
(capm.2a),Min spacing of capm to capm,,0.84,µm
(capm.2b),Minimum spacing of capacitor bottom_plate to bottom plate,,1.2,µm
(capm.3),Minimum enclosure of capm (top_plate) by met3,,0.14,µm
(capm.4),Min enclosure of via3 by capm,,0.14,µm
(capm.5),Min spacing between capm and via3,,0.14,µm
(capm.6),Maximum Aspect Ratio (Length/Width),,20,
(capm.7),Only rectangular or L-shaped capacitors allowed,,,
(capm.8),"Min space, no overlap, between via2 and capm",,0.14,µm
(capm.11),Min spacing between capm to (met3 not overlapping capm),,0.5,µm
1 change: 1 addition & 0 deletions docs/rules/periphery/periphery-split-csv.py
Original file line number Diff line number Diff line change
Expand Up @@ -91,6 +91,7 @@ def csv_fname(self):
no_pics = [
'p024-hvtr_dotdash.svg',
'p033-licon_dotdash.svg',
'p036-cap2m_dotdash.svg',
'p042-via3_dotdash.svg',
'p043-nsm_dotdash.svg',
'p044-m5_dotdash.svg',
Expand Down
47 changes: 34 additions & 13 deletions docs/rules/periphery/periphery.csv
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@ Rule,Section G2: Design Rules for SKY130*,Use,
, ,,
(x.-),General,,
,,,
1a,"p1m.md (OPC), DECA and AMKOR layers (pi1.dg, pmm.dg, rdl.dg, pi2.dg, ubm.dg, bump.dg) and mask data for p1m, met1, via, met2 must be on a grid of mm",,0.001,mm
1a,"p1m.md (OPC), DECA and AMKOR layers (pi1.dg, pmm.dg, rdl.dg, pi2.dg, ubm.dg, bump.dg) and mask data for p1m, met1, via, met2, capm and cap2m must be on a grid of mm",,0.001,mm
1b,Data for SKY130 layout and mask on all layers except those mentioned in 1a must be on a grid of mm (except inside Seal ring),,0.005,mm
2,Angles permitted on: diff,,N/A,N/A
,"Angles permitted on: diff except for:\n- diff inside ""advSeal_6µm* OR cuPillarAdvSeal_6µm*"" pcell, \n- diff rings around the die at min total L>1000 µm and W=0.3 µm",,n x 90,deg
Expand Down Expand Up @@ -742,18 +742,39 @@ irdrop.3,"For n > 100 contacts on the same connector, mcon area pre- and post- C
(capm.-),MIM Capacitor (Capm),,sky130
,Function: Defines MIM capacitor,,
,,,
1,Min width of capm,,N/A,N/A
2a,Min spacing of capm to capm,,N/A,N/A
2b,Minimum spacing of capacitor bottom_plate to bottom plate,,N/A,N/A
3,Minimum enclosure of capm (top_plate) by met2,,N/A,N/A
4,Min enclosure of via2 by capm,,N/A,N/A
5,Min spacing between capm and via2,,N/A,N/A
6,Maximum Aspect Ratio (Length/Width),,N/A,N/A
7,Only rectangular capacitors are allowed,,N/A,N/A
8,"Min space, no overlap, between via and capm",,N/A,N/A
10,"capm must not straddle nwell, diff, tap, poly, li1 and met1 (Rule exempted for capm overlapping capm_2t.dg)",TC,N/A,N/A
11,Min spacing between capm to (met2 not overlapping capm),,N/A,N/A
12,Max area of capm (um^2),,N/A,N/A
1,Min width of capm,,1,µm
2a,Min spacing of capm to capm,,0.84,µm
2b,Minimum spacing of capacitor bottom_plate to bottom plate,,1.2,µm
3,Minimum enclosure of capm (top_plate) by met3,,0.14,µm
4,Min enclosure of via3 by capm,,0.14,µm
5,Min spacing between capm and via3,,0.14,µm
6,Maximum Aspect Ratio (Length/Width),,20,
7,Only rectangular or L-shaped capacitors allowed,,,
8,"Min space, no overlap, between via2 and capm",,0.14,µm
11,Min spacing between capm to (met3 not overlapping capm),,0.5,µm
,,,
,,,
,,,
,,,
,,,
,,,
,,,
,,,
,,,
,,,
(cap2m.-),MIM Capacitor (Cap2m),,sky130
,Function: Defines MIM capacitor,,
,,,
1,Min width of cap2m,,1,µm
2a,Min spacing of cap2m to cap2m,,0.84,µm
2b,Minimum spacing of capacitor bottom_plate to bottom plate,,1.2,µm
3,Minimum enclosure of cap2m (top_plate) by met4,,0.14,µm
4,Min enclosure of via4 by cap2m,,0.2,µm
5,Min spacing between cap2m and via3,,0.2,µm
6,Maximum Aspect Ratio (Length/Width),,20,
7,Only rectangular or L-shaped capacitors allowed,,,
8,"Min space, no overlap, between via3 and cap2m",,0.14,µm
11,Min spacing between cap2m to (met3 not overlapping cap2m),,0.5,µm
,,,
,,,
,,,
Expand Down