Tweak circuits designed in VHDL/Verilog like CDC synchronizers, Reset synchronizers, Edge detectors, Pulse generators etc.
-- Multi-flop Synchronizer for CDC
-- Asynchronous Reset Synchronizer
-- Asychronous Reset De-assertion Synchronizer
-- Pulse Synchronizer for CDC
-- Mux-based Data Synchronizer for CDC
-- Edge Detector
-- Reset Stretcher
-- Min Width Resetter
-- Clock Divider
-- Pulse Generator
-- Clock Gate
All codes are fully synthesizable and tested. All are open-source codes, free to use, modify and distribute without any conflicts of interest with the original developer.
Mitu Raj, iammituraj@gmail.com