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[Driver][SYCL] Address issue with code splitting and FPGA Archives #15794

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Merged
merged 7 commits into from
Oct 24, 2024

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mdtoguchi
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When enabling device code splitting with FPGA archive generation (-fsycl-link) the resulting device images were not packed correctly. We were archiving the resulting -batch wrapped image, which in turn would not be extracted properly when being consumed.

To address this, update how the device images are created for insertion into the archive to be individual split binaries as opposed to using the wrapper -batch behavior. This is performed for both the early and image type archives.

When enabling device code splitting with FPGA archive generation
(-fsycl-link) the resulting device images were not packed correctly.  We
were archiving the resulting -batch wrapped image, which in turn would
not be extracted properly when being consumed.

To address this, update how the device images are created for insertion
into the archive to be individual split binaries as opposed to using the
wrapper -batch behavior.  This is performed for both the early and image
type archives.
@mdtoguchi mdtoguchi marked this pull request as ready for review October 21, 2024 23:45
@mdtoguchi mdtoguchi requested review from a team as code owners October 21, 2024 23:45
@mdtoguchi mdtoguchi requested a review from a team as a code owner October 22, 2024 14:41
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@sarnex sarnex left a comment

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tools change (removing XFAIL) LGTM, no idea about the driver part :)

also sorry for moving that test :)

@mdtoguchi
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@intel/dpcpp-clang-driver-reviewers - ping for review

@asudarsa asudarsa self-requested a review October 23, 2024 20:41
@@ -10263,8 +10263,18 @@ void OffloadWrapper::ConstructJob(Compilation &C, const JobAction &JA,
const InputInfo &I = Inputs[0];
assert(I.isFilename() && "Invalid input.");

if (I.getType() == types::TY_Tempfiletable ||
I.getType() == types::TY_Tempfilelist || IsEmbeddedIR)
// TODO: The embedded compilation step after the wrapping step restricts
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Why is this a TODO? Is this not more of a restriction?

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It is a restriction - but in my opinion it would be best to pull the compile step out of the wrapping step which provides a cleaner picture of the toolchain. We shouldn't expect the wrapping step to do the compilation too (it isn't embedded for OpenMP)

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LGTM. No blocking changes requested.

Thanks

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@intel/llvm-gatekeepers, this is ready for merge - thanks!

@sarnex sarnex merged commit 3f56c58 into intel:sycl Oct 24, 2024
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@mdtoguchi mdtoguchi deleted the fpga-multi-image-archive branch October 24, 2024 19:11
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5 participants