[SPIR-V][DOC] Add SPV_INTEL_hw_thread_queries extension spec #4747
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MrSidims
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The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel/llvm#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
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The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel/llvm#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
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Oct 11, 2021
The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel/llvm#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
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Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
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The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel/llvm#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
MrSidims
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Oct 18, 2021
The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel/llvm#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
vmaksimo
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Oct 25, 2021
The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com> Original commit: KhronosGroup/SPIRV-LLVM-Translator@ddb1c7a
Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
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Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
Quetzonarch
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Jul 13, 2022
The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel/llvm#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
stanleygambarin
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Jan 19, 2023
…onosGroup#1245) The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel/llvm#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
stanleygambarin
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Jan 19, 2023
…onosGroup#1245) The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel/llvm#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
stanleygambarin
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Jan 19, 2023
…onosGroup#1245) The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel/llvm#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
MrSidims
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Jan 21, 2023
[Backport to 13] Implement SPV_INTEL_hw_thread_queries extension The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel/llvm#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md [Backport to 13] Update SPV_INTEL_hw_thread_queries to rev 2 Replace local id with global id.
MrSidims
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Jan 21, 2023
The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel/llvm#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
MrSidims
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Jan 21, 2023
The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel/llvm#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
stanleygambarin
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Jan 24, 2023
…onosGroup#1245) The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel/llvm#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
stanleygambarin
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Jan 24, 2023
…nosGroup#1245) The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel/llvm#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
MrSidims
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Jan 24, 2023
The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel/llvm#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
stanleygambarin
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Jan 25, 2023
…onosGroup#1245) The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel/llvm#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
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Jan 26, 2023
The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel/llvm#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
stanleygambarin
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Jan 28, 2023
…nosGroup#1245) The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel/llvm#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
MrSidims
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Jan 28, 2023
The extension adds BuiltIn decorations to query maximum number of H/W threads per a sub-device (tile), a sub-device ID and a H/W thread ID within the sub-device. These instructions combined can be used to calculate a unique H/W thread on which the code is being launched. Spec: intel/llvm#4747 Some info about Intel multi-tile cards: https://github.com/intel/llvm/blob/sycl/sycl/doc/MultiTileCardWithLevelZero.md Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
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Signed-off-by: Dmitry Sidorov dmitry.sidorov@intel.com