[SYCL][HIP] Implement PI_DEVICE_INFO_ATOMIC_64 for HIP #6429
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@pgorlani The changes looks good, but there are now unexpected passes in testing. Is there an llvm-test-suite PR for enabling those two tests? |
pgorlani
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Jul 13, 2022
This patch re-enables the aspect::atomic64 tests for HIP after the PI_DEVICE_INFO_ATOMIC_64 implementation in intel/llvm#6429
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Hi @sergey-semenov, here is intel/llvm-test-suite#1094. |
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/verify with intel/llvm-test-suite#1094 |
sergey-semenov
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Jul 13, 2022
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Hi @sergey-semenov, Thanks! |
againull
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Aug 12, 2022
This patch re-enables the aspect::atomic64 tests for HIP after the PI_DEVICE_INFO_ATOMIC_64 implementation in intel/llvm#6429
AlexeySachkov
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Sep 7, 2022
Support for atomic64 aspect query on HIP was added in:
commit cb190fc25d56f42b3283a3a31c13ead47be46f60
Author: pgorlani <92453485+pgorlani@users.noreply.github.com>
Date: Fri Aug 12 18:54:29 2022 +0100
[SYCL][HIP] Implement PI_DEVICE_INFO_ATOMIC_64 for HIP (intel/llvm#6429)
AlexeySachkov
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to intel/llvm-test-suite
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Sep 7, 2022
Support for atomic64 aspect query on HIP was added in:
```
commit cb190fc25d56f42b3283a3a31c13ead47be46f60
Author: pgorlani <92453485+pgorlani@users.noreply.github.com>
Date: Fri Aug 12 18:54:29 2022 +0100
[SYCL][HIP] Implement PI_DEVICE_INFO_ATOMIC_64 for HIP (intel/llvm#6429)
```
aelovikov-intel
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Mar 27, 2023
) This patch re-enables the aspect::atomic64 tests for HIP after the PI_DEVICE_INFO_ATOMIC_64 implementation in intel#6429
aelovikov-intel
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Mar 27, 2023
Support for atomic64 aspect query on HIP was added in: ``` commit cb190fc Author: pgorlani <92453485+pgorlani@users.noreply.github.com> Date: Fri Aug 12 18:54:29 2022 +0100 [SYCL][HIP] Implement PI_DEVICE_INFO_ATOMIC_64 for HIP (intel#6429) ```
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This patch implements
aspect::atomic64by querying the information related to the 64-bit integer atomic operations. At the moment, the floating-point atomics are not supported at all (single and double precision) for AMD devices. TheSYCL_USE_NATIVE_FP_ATOMICSis not set for AMD, and theatomc_refclass handles the lack of double and single precision atomic operations.We may want to revisit this implementation when the floating-point atomics will be supported by AMD too.
However, I think this is not necessary for three reasons:
atomic64aspect "Indicates that kernels submitted to the device may perform 64-bit atomic operations." It expresses a possibility, not specifying any kind of operations or data types.atomic_refsay "For floating-point types, the member functions of the atomic_ref class may be emulated, and may use a different floating-point environment to ..." implying that the floating-point operations inatomic_refdo not need to be supported natively by the hardware.This solves #5570, #6054, and allows to re-enable tests in intel/llvm-test-suite#861.