Logic 2 CMPN111 Project

Intel 8254 Created in Verilog

Name		Name	Last commit message	Last commit date
Latest commit History 24 Commits
.gitignore		.gitignore
Counter0Integrated.v		Counter0Integrated.v
Counter0Integrated.v.bak		Counter0Integrated.v.bak
Intel-8254.cr.mti		Intel-8254.cr.mti
Intel-8254.mpf		Intel-8254.mpf
Mode1.v		Mode1.v
Mode1.v.bak		Mode1.v.bak
Mode1_tb.v		Mode1_tb.v
README.md		README.md
control.v		control.v
control.v.bak		control.v.bak
control_tb.v		control_tb.v
counter.v		counter.v
counter0.v		counter0.v
counterTBKhaled.v		counterTBKhaled.v
counterTBKhaled.v.bak		counterTBKhaled.v.bak
counter_tb.v		counter_tb.v
intel8254.v		intel8254.v
intel8254.v.bak		intel8254.v.bak
intel8254_tb.v		intel8254_tb.v
read-write.v		read-write.v
read_write_tb.v		read_write_tb.v
vsim.wlf		vsim.wlf

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