Skip to content
View jakubcabal's full-sized avatar
Block or Report

Block or report jakubcabal

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this userโ€™s behavior. Learn more about reporting abuse.

Report abuse
jakubcabal/README.md

Hi there ๐Ÿ‘‹

I am FPGA engineer in Czech Republic, technology enthusiast, food lover and Linux user (Fedora).

  • ๐Ÿข I'm currently working at CESNET z.s.p.o.
  • ๐ŸŽ“ My Alma mater: Brno University of Technology
  • ๐Ÿ“ซ How to reach me: Twitter, Telegram
  • โšก Fun fact: I know my ancestors until the 17th century.

Popular repositories

  1. spi-fpga spi-fpga Public

    SPI master and SPI slave for FPGA written in VHDL

    VHDL 157 38

  2. uart-for-fpga uart-for-fpga Public

    Simple UART controller for FPGA written in VHDL

    VHDL 89 27

  3. rmii-firewall-fpga rmii-firewall-fpga Public

    RMII Firewall FPGA

    VHDL 17 3

  4. pipemania-fpga-game pipemania-fpga-game Public

    Pipe Mania - Game for FPGA written in VHDL

    VHDL 9 1

  5. sdram-tester-fpga sdram-tester-fpga Public

    SDRAM Tester implemented in FPGA

    VHDL 8 1

  6. cyc1000-rsu cyc1000-rsu Public

    The CYC1000 FPGA Remote System Upgrade project

    VHDL 7