Pinned Loading
-
verilog-to-routing/vtr-verilog-to-routing
verilog-to-routing/vtr-verilog-to-routing PublicVerilog to Routing -- Open Source CAD Flow for FPGA Research
-
QuickLogic-Corp/quicklogic-fpga-toolchain
QuickLogic-Corp/quicklogic-fpga-toolchain PublicOpen Source FPGA toolchain and documentation for QuickLogic devices and eFPGA IP
-
QuickLogic-Corp/symbiflow-arch-defs
QuickLogic-Corp/symbiflow-arch-defs PublicForked from antmicro/f4pga-arch-defs
FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
-
QuickLogic-Corp/ql_designs
QuickLogic-Corp/ql_designs PublicOpensource designs for testing
Something went wrong, please refresh the page to try again.
If the problem persists, check the GitHub status page or contact support.
If the problem persists, check the GitHub status page or contact support.