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Add ability to have a commented statement #31

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Merged
merged 3 commits into from
Jan 6, 2020
Merged

Add ability to have a commented statement #31

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7580478
Add ability to have a commented statement
leonardt Dec 20, 2019
18b4f33
Fix extraneous parens
leonardt Dec 20, 2019
faceff5
Merge branch 'master' into comment-contents
leonardt Jan 6, 2020
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8 changes: 6 additions & 2 deletions include/verilogAST.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -304,9 +304,13 @@ class SingleLineComment : public StructuralStatement,
public BehavioralStatement {
public:
std::string value;
std::unique_ptr<Statement> statement; // optional

SingleLineComment(std::string value) : value(value){};
std::string toString() { return "// " + value; };
SingleLineComment(std::string value)
: value(value), statement(std::unique_ptr<Statement>{}){};
SingleLineComment(std::string value, std::unique_ptr<Statement> statement)
: value(value), statement(std::move(statement)){};
std::string toString();
~SingleLineComment(){};
};

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38 changes: 23 additions & 15 deletions src/verilogAST.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -186,19 +186,19 @@ std::string BinaryOp::toString() {
std::string lstr = left->toString();
std::string rstr = right->toString();
// TODO Precedence logic, for now we just insert parens if not symbol or num
if (dynamic_cast<Identifier*>(left.get())) {
} else if (dynamic_cast<NumericLiteral*>(left.get())) {
} else if (dynamic_cast<Index*>(left.get())) {
} else if (dynamic_cast<Slice*>(left.get())) {
if (dynamic_cast<Identifier *>(left.get())) {
} else if (dynamic_cast<NumericLiteral *>(left.get())) {
} else if (dynamic_cast<Index *>(left.get())) {
} else if (dynamic_cast<Slice *>(left.get())) {
} else {
lstr = "(" + lstr + ")";
lstr = "(" + lstr + ")";
}
if (dynamic_cast<Identifier*>(right.get())) {
} else if (dynamic_cast<NumericLiteral*>(right.get())) {
} else if (dynamic_cast<Index*>(right.get())) {
} else if (dynamic_cast<Slice*>(right.get())) {
if (dynamic_cast<Identifier *>(right.get())) {
} else if (dynamic_cast<NumericLiteral *>(right.get())) {
} else if (dynamic_cast<Index *>(right.get())) {
} else if (dynamic_cast<Slice *>(right.get())) {
} else {
rstr = "(" + rstr + ")";
rstr = "(" + rstr + ")";
}
return lstr + ' ' + op_str + ' ' + rstr;
}
Expand Down Expand Up @@ -242,12 +242,12 @@ std::string UnaryOp::toString() {
}
std::string operand_str = operand->toString();
// TODO Precedence logic, for now we just insert parens if not symbol or num
if (dynamic_cast<Identifier*>(operand.get())) {
} else if (dynamic_cast<NumericLiteral*>(operand.get())) {
} else if (dynamic_cast<Index*>(operand.get())) {
} else if (dynamic_cast<Slice*>(operand.get())) {
if (dynamic_cast<Identifier *>(operand.get())) {
} else if (dynamic_cast<NumericLiteral *>(operand.get())) {
} else if (dynamic_cast<Index *>(operand.get())) {
} else if (dynamic_cast<Slice *>(operand.get())) {
} else {
operand_str = "(" + operand_str + ")";
operand_str = "(" + operand_str + ")";
}
return op_str + ' ' + operand_str;
}
Expand Down Expand Up @@ -460,4 +460,12 @@ std::unique_ptr<Vector> make_vector(std::unique_ptr<Identifier> id,
std::move(lsb));
}

std::string SingleLineComment::toString() {
std::string result = "";
if (this->statement) {
result += this->statement->toString() + " ";
}
return result + "// " + value;
}

} // namespace verilogAST
7 changes: 7 additions & 0 deletions tests/basic.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -394,6 +394,13 @@ TEST(BasicTests, Comment) {
vAST::BlockComment block_comment("Test comment\non multiple lines");
EXPECT_EQ(block_comment.toString(),
"/*\nTest comment\non multiple lines\n*/");
std::unique_ptr<vAST::ContinuousAssign> cont_assign =
std::make_unique<vAST::ContinuousAssign>(
std::make_unique<vAST::Identifier>("a"),
std::make_unique<vAST::Identifier>("b"));
vAST::SingleLineComment stmt_with_comment("Test comment",
std::move(cont_assign));
EXPECT_EQ(stmt_with_comment.toString(), "assign a = b; // Test comment");
}
TEST(BasicTests, InlineVerilog) {
vAST::InlineVerilog inline_verilog(
Expand Down