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Description
- evaluate how much of https://osresearch.net/Prerequisites#legacy-vs-maximized-boards is pertinent, considering thee is no more legacy boards under https://github.com/linuxboot/heads/tree/master/boards
- pertinence seems only to be for posterity, historical reasons
- same applies now to "maximized" boards, in the sense that since there is no more "legacy" boards (non-maximized), legacy is not used anymore to differentiate things between variants of a board: all boards are "maximized" boards.
- Should "maximized" and "legacy" related docs be suppressed, moved, archived?
TLDR: maximized boards were created so that the Managemenet Engine (ME) was downloaded from manufacturer's website binaries, extracted, neutered(Intel <=3rd gen), then later on at least deactivated (Intel >4th gen). ROM IFD was modified so that ME region was reduced and unlocked, and freed space if any, given to the BIOS region so that the ROM became "maxximized", which meant both neutering or reducing at maximum bloat and blobs to the bare minimum and freed space given to better use, which meant permitting Heads to continue developping features which otherwise was simply impossible by lack of SPI space available for linux based coreboot payload and tools needed for linuxboot/heads to do its job.
Also note that historically, ME could not be neutered.
A reminder that
- xx20 platforms (ie x220) was Intel 2nd gen cpu based, and had a single 8mb SPI chip, where ME was occupying 5 of 8mb.
- xx30 platforms (ie x230) was Intel 3rd gen cpu based, and had two SPI chips (4mb+8mb), where ME was occupying 5mb of 12 mb.
So the x230 required a "flash" board variant, that the user flashed over the 4mb SPI flash and then booting inside that firmware to flash only the BIOS region of the unmodified IFD with the "legacy" variant of a board. When "maximized" variant came to existence, end user had to flash both 4mb and 8mb SPI chips once, unlocking IFD, ME and overwriting IFD, ME, BIOS and GBE (ethernet config blob) all at once, permitting for the first time whole, external flashing of SPI chips to boot into Heads and then permitting to internally upgrade from there on forever.
Question is: what is necessary to keep of that, and the existing docs. Newcoers asks all the time: do I need to extract blobs? Where at the end, they should just download/build the board's ROM artifacts, verify their hashes and flash externally following external flashing best practices (no external power sources, proper voltage for SPI chips, take backups, etc)...