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[FIRRTLToHW] Add missing twoState attributes #5257

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merged 3 commits into from
Jun 27, 2023

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fzi-hielscher
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FIRRTL is specified to be strictly two-state, thus, after lowering, all relevant comb operations should carry the twoState attribute. This PR picks up a few instances where it was missing.

I'm currently working on the CombFolds to ensure they retain n-state behaviour for Verilog and/or VHDL if the attribute is missing (thanks @darthscsi for enduring my questions during last week's meeting). I'd be happy to get some early feedback on my changes to make sure I'm on the right track: https://github.com/fzi-hielscher/circt/tree/nuke-nstate-opts

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@uenoku uenoku left a comment

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Thanks, this looks good to me.

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@darthscsi darthscsi left a comment

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Thanks!

auto allOnes = builder.create<hw::ConstantOp>(loc, value.getType(), -1);
return builder.createOrFold<XorOp>(loc, value, allOnes, false);
return builder.createOrFold<XorOp>(loc, value, allOnes, twoState);
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It saddens me that I had to check the Verilog spec to verify not and xor had the same truth table for 'x and 'z. (Tables 11-13 and 11-15).

Assuming lowerElementwiseLogicalOp is only used for logical ops.
@fzi-hielscher
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Sorry for the iteration, but I noticed that setting the attribute after (potential) folding is not a great idea and also uneccessarily complicated at that point.

@darthscsi
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I think just waiting on clang-format cleanliness.

@fzi-hielscher
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I'm slightly confused about the problem. The clang-format error occurs in a file that I did not change (FIRRTLTypes.cpp) and has already been fixed in #5153. Should I rebase the PR?

@darthscsi darthscsi merged commit 9370ee4 into llvm:main Jun 27, 2023
@fzi-hielscher fzi-hielscher deleted the firrtl-twostate-patch branch July 17, 2023 21:31
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3 participants