[FIRRTL][CreateSifiveMetadata] Use symbols for memory metadata #5482
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dtzSiFive
reviewed
Jun 26, 2023
| // CHECK: sv.verbatim "[\0A {\0A \22module_name\22: \22 | ||
| // CHECK-SAME: {{0}} | ||
| // CHECK-SAME: \22,\0A \22depth\22: 16,\0A \22width\22: 8,\0A \22masked\22: false,\0A \22read\22: 1,\0A \22write\22: 0,\0A \22readwrite\22: 1,\0A \22extra_ports\22: [],\0A \22 | ||
| // CHECK-SAME: hierarchy\22: [\0A \22{{[{][{]3[}][}]}}.{{[{][{]4[}][}]}}.memory_ext |
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Suggestion: Can this be simplified/more readable with CHECK-SAME{LITERAL}: instead?
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Yes, thanks for reminding. Updated with it.
seldridge
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Jun 27, 2023
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| auto dutVerbatimOp = builder.create<sv::VerbatimOp>( | ||
| builder.getUnknownLoc(), dutJsonBuffer, ValueRange(), | ||
| builder.getArrayAttr(jsonSymbols)); |
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Nit: the PR could save on the two builder.getUnknownLoc() by using an ImplicitLocOpBuilder instead of an OpBuilder.
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Thanks for catching this. Fixed.
prithayan
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Thanks for review. I tested on few internal designs, looks good. Also verified that this fixes the issue with ForceNameAnnotation on the internal design. |
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Use symbols to emit memory metadata, this ensures that the instance names respect any renaming due to
ForceNameAnnotation. Since memory instance cannot be renamed, use it as verbatim, this ensures that the pre-extract paths for seq mems are used.Fixes #5469
For reference, the previous change related to ExtractSeqMems, #3123