x86 SIMD intrinsics are sometimes compiled with a weird choice of width

[kalenedrael]

When compiling the following code, which uses SIMD intrinsics:

#include <immintrin.h>

void fn(float *f, int *d, bool *b) {
    auto v_zero = _mm256_set1_epi32(0);
    auto v_zero_f = _mm256_set1_ps(0.0f);

    auto v = _mm256_loadu_ps(f);
    auto mask = _mm256_cmpeq_epi32(_mm256_castps_si256(v), v_zero);

    auto v_s = _mm256_loadu_si256((const __m256i*)(d));
    mask = _mm256_or_si256(mask, _mm256_cmpgt_epi32(v_s, v_zero));

    auto v_b = _mm256_cvtepu8_epi32(_mm_loadu_si64(b));
    mask = _mm256_or_si256(mask, _mm256_cmpgt_epi32(v_b, v_zero));

    v = _mm256_blendv_ps(v_zero_f, v, _mm256_castsi256_ps(mask));
    _mm256_storeu_ps(f, v);
}

Even though mask is nominally 8 packed 32-bit values and the only other width is 8 bit, Clang chooses to perform some operations on it as packed 16-bit values:

        vmovdqu ymm0, ymmword ptr [rdi]
        vpxor   xmm1, xmm1, xmm1
        vpcmpeqd        ymm2, ymm0, ymm1
        vmovdqu ymm3, ymmword ptr [rsi]
        vpcmpgtd        ymm1, ymm3, ymm1
        vpor    ymm1, ymm2, ymm1
        vextracti128    xmm2, ymm1, 1
        vpackssdw       xmm1, xmm1, xmm2
        vmovq   xmm2, qword ptr [rdx]
        vpxor   xmm3, xmm3, xmm3
        vpcmpeqb        xmm2, xmm2, xmm3
        vpcmpeqd        xmm3, xmm3, xmm3
        vpxor   xmm2, xmm2, xmm3
        vpmovsxbw       xmm2, xmm2
        vpor    xmm1, xmm1, xmm2
        vpmovsxwd       ymm1, xmm1
        vpand   ymm0, ymm1, ymm0
        vmovdqu ymmword ptr [rdi], ymm0
        vzeroupper
        ret

Compare to GCC, which just uses the expected width:

        vmovups ymm2, YMMWORD PTR [rdi]
        vmovdqu ymm0, YMMWORD PTR [rsi]
        vpxor   xmm1, xmm1, xmm1
        vpmovzxbd       ymm3, QWORD PTR [rdx]
        vpcmpeqd        ymm4, ymm2, ymm1
        vpcmpgtd        ymm0, ymm0, ymm1
        vpcmpgtd        ymm3, ymm3, ymm1
        vpor    ymm0, ymm0, ymm4
        vpor    ymm0, ymm0, ymm3
        vpcmpgtd        ymm1, ymm1, ymm0
        vandps  ymm2, ymm2, ymm1
        vmovups YMMWORD PTR [rdi], ymm2
        vzeroupper
        ret

If any component of mask is removed, the issue disappears.

Example: https://godbolt.org/z/6zEYresqM

[llvmbot]

@llvm/issue-subscribers-backend-x86

Author: Chris Lu (kalenedrael)

When compiling the following code, which uses SIMD intrinsics: ``` #include <immintrin.h>

void fn(float *f, int *d, bool *b) {
auto v_zero = _mm256_set1_epi32(0);
auto v_zero_f = _mm256_set1_ps(0.0f);

auto v = _mm256_loadu_ps(f);
auto mask = _mm256_cmpeq_epi32(_mm256_castps_si256(v), v_zero);

auto v_s = _mm256_loadu_si256((const __m256i*)(d));
mask = _mm256_or_si256(mask, _mm256_cmpgt_epi32(v_s, v_zero));

auto v_b = _mm256_cvtepu8_epi32(_mm_loadu_si64(b));
mask = _mm256_or_si256(mask, _mm256_cmpgt_epi32(v_b, v_zero));

v = _mm256_blendv_ps(v_zero_f, v, _mm256_castsi256_ps(mask));
_mm256_storeu_ps(f, v);

}

Even though `mask` is nominally 8 packed 32-bit values and the only other width is 8 bit, Clang chooses to perform some operations on it as packed 16-bit values:

    vmovdqu ymm0, ymmword ptr [rdi]
    vpxor   xmm1, xmm1, xmm1
    vpcmpeqd        ymm2, ymm0, ymm1
    vmovdqu ymm3, ymmword ptr [rsi]
    vpcmpgtd        ymm1, ymm3, ymm1
    vpor    ymm1, ymm2, ymm1
    vextracti128    xmm2, ymm1, 1
    vpackssdw       xmm1, xmm1, xmm2
    vmovq   xmm2, qword ptr [rdx]
    vpxor   xmm3, xmm3, xmm3
    vpcmpeqb        xmm2, xmm2, xmm3
    vpcmpeqd        xmm3, xmm3, xmm3
    vpxor   xmm2, xmm2, xmm3
    vpmovsxbw       xmm2, xmm2
    vpor    xmm1, xmm1, xmm2
    vpmovsxwd       ymm1, xmm1
    vpand   ymm0, ymm1, ymm0
    vmovdqu ymmword ptr [rdi], ymm0
    vzeroupper
    ret

Compare to GCC, which just uses the expected width:

    vmovups ymm2, YMMWORD PTR [rdi]
    vmovdqu ymm0, YMMWORD PTR [rsi]
    vpxor   xmm1, xmm1, xmm1
    vpmovzxbd       ymm3, QWORD PTR [rdx]
    vpcmpeqd        ymm4, ymm2, ymm1
    vpcmpgtd        ymm0, ymm0, ymm1
    vpcmpgtd        ymm3, ymm3, ymm1
    vpor    ymm0, ymm0, ymm4
    vpor    ymm0, ymm0, ymm3
    vpcmpgtd        ymm1, ymm1, ymm0
    vandps  ymm2, ymm2, ymm1
    vmovups YMMWORD PTR [rdi], ymm2
    vzeroupper
    ret

If any component of `mask` is removed, the issue disappears.

Example: https://godbolt.org/z/6zEYresqM
</details>

[RKSimon]

define dso_local void @fn(ptr noundef captures(none) %f, ptr noundef readonly captures(none) %d, ptr noundef readonly captures(none) %b) local_unnamed_addr {
entry:
  %0 = load <8 x float>, ptr %f, align 1
  %cmp.i = tail call <8 x i1> @llvm.is.fpclass.v8f32(<8 x float> %0, i32 64)
  %1 = load <8 x i32>, ptr %d, align 1
  %cmp.i25 = icmp sgt <8 x i32> %1, zeroinitializer
  %or.i222728 = or <8 x i1> %cmp.i, %cmp.i25
  %2 = load <8 x i8>, ptr %b, align 1
  %cmp.i23 = icmp ne <8 x i8> %2, zeroinitializer
  %or.i2930 = or <8 x i1> %or.i222728, %cmp.i23
  %3 = select <8 x i1> %or.i2930, <8 x float> %0, <8 x float> zeroinitializer
  store <8 x float> %3, ptr %f, align 1
  ret void
}

declare <8 x i1> @llvm.is.fpclass.v8f32(<8 x float>, i32 immarg) #1

[RKSimon]

Further simplified (avoid fp ops):

define <8 x i32> @fn2(ptr %p0, ptr %p1, ptr %p2) {
  %ld0 = load <8 x i32>, ptr %p0, align 1
  %ld1 = load <8 x i32>, ptr %p1, align 1
  %ld2 = load <8 x i8>, ptr %p2, align 1
  %cmp0 = icmp sge <8 x i32> %ld0, zeroinitializer
  %cmp1 = icmp sgt <8 x i32> %ld1, zeroinitializer
  %cmp2 = icmp ne <8 x i8> %ld2, zeroinitializer
  %cmp01 = or <8 x i1> %cmp0, %cmp1
  %cmp012 = or <8 x i1> %cmp01, %cmp2
  %res = select <8 x i1> %cmp012, <8 x i32> %ld0, <8 x i32> zeroinitializer
  ret <8 x i32> %res
}

[kalenedrael]

Thanks for the quick fix!